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BQ24295RGER
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Texas Instruments Battery Management, VQFN-24-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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BQ24295RGER
Texas Instruments · Battery Management · VQFN-24-EP(4x4)
BQ24295RGER from Texas Instruments, in a VQFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VBUS | power_in | Charger input voltage; the internal n-channel reverse block MOSFET (RBFET) connects VBUS to PMID with VBUS on source, and a 1-µF ceramic capacitor should be placed from VBUS to PGND as close as possible to the IC. |
| 2 | D+ | input | Positive line of the USB data pair used for D+/D- based host/charging port detection, including data contact detection (DCD) and BC1.2 primary detection. |
| 3 | D- | input | Negative line of the USB data pair used for D+/D- based host/charging port detection, including data contact detection (DCD) and BC1.2 primary detection. |
| 4 | STAT | output | Open-drain charge status output: LOW indicates charge in progress, HIGH indicates charge complete or charge disabled, and a fault blinks STAT at 1 Hz; connect to the pull-up rail through 10 kΩ. |
| 5 | SCL | input | I2C interface clock; connect SCL to the logic rail through a 10-kΩ resistor. |
| 6 | SDA | bidirectional | I2C interface data; connect SDA to the logic rail through a 10-kΩ resistor. |
| 7 | INT | output | Open-drain interrupt output that sends an active-low 256-µs pulse to the host to report charger status and faults; connect to a logic rail through 10 kΩ. |
| 8 | OTG | input | OTG enable pin: boost mode is activated when OTG is high, REG01[5] = 1, and no input source is detected at VBUS. |
| 9 | CE | input | Active-low charge enable: battery charging is enabled when REG01[5:4] = 01 and CE is low, and CE must be pulled high or low. |
| 10 | ILIM | input | Sets the maximum input current by regulating the ILIM voltage at 1 V through a resistor to ground, with IINMAX = (1 V/RILIM) × KILIM; the minimum current programmed on ILIM is 500 mA. |
| 11 | TS | input | Temperature qualification voltage input for a negative temperature coefficient thermistor, biased by a resistor divider from REGN to TS to GND; charge suspends or boost disables when TS is out of range, and a 103AT-2 thermistor is recommended. |
| 12 | QON | input | BATFET enable control in shipping mode: a logic low-to-high transition with at least 2 ms high level turns on the BATFET to exit shipping mode, and the pin has an internal 1-MΩ (typ) pull-down. |
| 13 | BAT | power_in | Battery connection to the positive terminal of the battery pack; the internal BATFET connects BAT to SYS, and a 10-µF capacitor should be placed close to the BAT pin. |
| 14 | BAT | power_in | Battery connection to the positive terminal of the battery pack; the internal BATFET connects BAT to SYS, and a 10-µF capacitor should be placed close to the BAT pin. |
| 15 | SYS | power_out | System connection point connected to BAT through the internal BATFET; when the battery falls below the minimum system voltage, the switch-mode converter keeps SYS above the minimum system voltage. |
| 16 | SYS | power_out | System connection point connected to BAT through the internal BATFET; when the battery falls below the minimum system voltage, the switch-mode converter keeps SYS above the minimum system voltage. |
| 17 | PGND | power_in | Power ground for the high-current converter node, connected internally to the source of the n-channel LSFET; a single-point connection between PGND and analog GND near the IC PGND pin is recommended. |
| 18 | PGND | power_in | Power ground for the high-current converter node, connected internally to the source of the n-channel LSFET; a single-point connection between PGND and analog GND near the IC PGND pin is recommended. |
| 19 | SW | output | Switching node connected to the output inductor, internally tied to the HSFET source and LSFET drain; a 0.047-µF bootstrap capacitor connects from SW to BTST. |
| 20 | SW | output | Switching node connected to the output inductor, internally tied to the HSFET source and LSFET drain; a 0.047-µF bootstrap capacitor connects from SW to BTST. |
| 21 | BTST | power_in | PWM high-side driver positive supply, internally connected to the anode of the bootstrap diode; a 0.047-µF bootstrap capacitor connects from SW to BTST. |
| 22 | REGN | power_out | PWM low-side driver positive supply output, internally connected to the cathode of the bootstrap diode; a 4.7-µF (10-V rating) ceramic capacitor from REGN to analog GND should be placed close to the IC, and REGN also biases the TS pin. |
| 23 | PMID | power_out | Battery boost mode output voltage connected to the drain of the reverse blocking MOSFET and the drain of the HSFET; a minimum of 20 µF is required from PMID to PGND. |
| 24 | VBUS | power_in | Charger input voltage, shared with pin 1; the internal RBFET connects VBUS to PMID with VBUS on source, and a 1-µF ceramic capacitor should be placed from VBUS to PGND as close as possible to the IC. |
| 25 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-24-EP(4x4) |
| Category | Power Management (PMIC) |
| Pins | 25 |
CAD (KiCad official)
- Symbol:
BQ24295RGER - Footprint:
Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm - 3D model: VQFN-24-EP(4x4) (KiCad packages3D, STEP)
- 3D model files:
bq24295rger-etched.step/bq24295rger-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);bq24295rger.step/bq24295rger.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (53 pp, sha256
9bff4d16438b4652, retrieved 2026-10-10, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# BQ24295RGER
**Texas Instruments** · Battery Management · VQFN-24-EP(4x4)
BQ24295RGER from Texas Instruments, in a VQFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VBUS | power_in | Charger input voltage; the internal n-channel reverse block MOSFET (RBFET) connects VBUS to PMID with VBUS on source, and a 1-µF ceramic capacitor should be placed from VBUS to PGND as close as possible to the IC. |
| 2 | D+ | input | Positive line of the USB data pair used for D+/D- based host/charging port detection, including data contact detection (DCD) and BC1.2 primary detection. |
| 3 | D- | input | Negative line of the USB data pair used for D+/D- based host/charging port detection, including data contact detection (DCD) and BC1.2 primary detection. |
| 4 | STAT | output | Open-drain charge status output: LOW indicates charge in progress, HIGH indicates charge complete or charge disabled, and a fault blinks STAT at 1 Hz; connect to the pull-up rail through 10 kΩ. |
| 5 | SCL | input | I2C interface clock; connect SCL to the logic rail through a 10-kΩ resistor. |
| 6 | SDA | bidirectional | I2C interface data; connect SDA to the logic rail through a 10-kΩ resistor. |
| 7 | INT | output | Open-drain interrupt output that sends an active-low 256-µs pulse to the host to report charger status and faults; connect to a logic rail through 10 kΩ. |
| 8 | OTG | input | OTG enable pin: boost mode is activated when OTG is high, REG01[5] = 1, and no input source is detected at VBUS. |
| 9 | CE | input | Active-low charge enable: battery charging is enabled when REG01[5:4] = 01 and CE is low, and CE must be pulled high or low. |
| 10 | ILIM | input | Sets the maximum input current by regulating the ILIM voltage at 1 V through a resistor to ground, with IINMAX = (1 V/RILIM) × KILIM; the minimum current programmed on ILIM is 500 mA. |
| 11 | TS | input | Temperature qualification voltage input for a negative temperature coefficient thermistor, biased by a resistor divider from REGN to TS to GND; charge suspends or boost disables when TS is out of range, and a 103AT-2 thermistor is recommended. |
| 12 | QON | input | BATFET enable control in shipping mode: a logic low-to-high transition with at least 2 ms high level turns on the BATFET to exit shipping mode, and the pin has an internal 1-MΩ (typ) pull-down. |
| 13 | BAT | power_in | Battery connection to the positive terminal of the battery pack; the internal BATFET connects BAT to SYS, and a 10-µF capacitor should be placed close to the BAT pin. |
| 14 | BAT | power_in | Battery connection to the positive terminal of the battery pack; the internal BATFET connects BAT to SYS, and a 10-µF capacitor should be placed close to the BAT pin. |
| 15 | SYS | power_out | System connection point connected to BAT through the internal BATFET; when the battery falls below the minimum system voltage, the switch-mode converter keeps SYS above the minimum system voltage. |
| 16 | SYS | power_out | System connection point connected to BAT through the internal BATFET; when the battery falls below the minimum system voltage, the switch-mode converter keeps SYS above the minimum system voltage. |
| 17 | PGND | power_in | Power ground for the high-current converter node, connected internally to the source of the n-channel LSFET; a single-point connection between PGND and analog GND near the IC PGND pin is recommended. |
| 18 | PGND | power_in | Power ground for the high-current converter node, connected internally to the source of the n-channel LSFET; a single-point connection between PGND and analog GND near the IC PGND pin is recommended. |
| 19 | SW | output | Switching node connected to the output inductor, internally tied to the HSFET source and LSFET drain; a 0.047-µF bootstrap capacitor connects from SW to BTST. |
| 20 | SW | output | Switching node connected to the output inductor, internally tied to the HSFET source and LSFET drain; a 0.047-µF bootstrap capacitor connects from SW to BTST. |
| 21 | BTST | power_in | PWM high-side driver positive supply, internally connected to the anode of the bootstrap diode; a 0.047-µF bootstrap capacitor connects from SW to BTST. |
| 22 | REGN | power_out | PWM low-side driver positive supply output, internally connected to the cathode of the bootstrap diode; a 4.7-µF (10-V rating) ceramic capacitor from REGN to analog GND should be placed close to the IC, and REGN also biases the TS pin. |
| 23 | PMID | power_out | Battery boost mode output voltage connected to the drain of the reverse blocking MOSFET and the drain of the HSFET; a minimum of 20 µF is required from PMID to PGND. |
| 24 | VBUS | power_in | Charger input voltage, shared with pin 1; the internal RBFET connects VBUS to PMID with VBUS on source, and a 1-µF ceramic capacitor should be placed from VBUS to PGND as close as possible to the IC. |
| 25 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-24-EP(4x4) |
| Category | Power Management (PMIC) |
| Pins | 25 |
## CAD (KiCad official)
- Symbol: `BQ24295RGER`
- Footprint: `Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm`
- 3D model: VQFN-24-EP(4x4) (KiCad packages3D, STEP)
- 3D model files: `bq24295rger-etched.step` / `bq24295rger-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `bq24295rger.step` / `bq24295rger.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/bq24295) (53 pp, sha256 `9bff4d16438b4652`, retrieved 2026-10-10, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/bq24295rger-datasheet.pdf)