# BQ24259RGER

**Texas Instruments** · Battery Management · VQFN-24-EP(4x4)

BQ24259RGER from Texas Instruments, in a VQFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VBUS | power_in | Charger input voltage; internal n-channel reverse-blocking MOSFET (RBFET) is connected between VBUS and PMID with VBUS on source. |
| 2 | PSEL | input | Power source selection input; HIGH indicates USB host source, LOW indicates adapter source. |
| 3 | PG | output | Open-drain active-low power-good indicator; LOW indicates good input source when voltage is between UVLO and ACOV, above SLEEP threshold, and current limit is above 30 mA. |
| 4 | STAT | output | Open-drain charge status output; LOW indicates charge in progress, HIGH indicates charge complete or disabled, blinking at 1 Hz during fault. |
| 5 | SCL | input | I2C interface clock input; connect to logic rail through 10-kΩ resistor. |
| 6 | SDA | bidirectional | I2C interface data bidirectional line; connect to logic rail through 10-kΩ resistor. |
| 7 | INT | output | Open-drain interrupt output; sends 256-µs active-low pulse to host to report charger device status and fault. |
| 8 | OTG | input | Digital USB current limit selection pin during buck mode and active-high enable pin during boost mode; in buck mode with PSEL=High, OTG=High sets IIN to 500 mA, OTG=Low sets to 100 mA. |
| 9 | CE | input | Active-low Charge Enable pin; battery charging is enabled when REG01[5:4] = 01 and CE pin is Low. |
| 10 | ILIM | input | Input current limit setting pin; sets maximum input current limit by regulating ILIM voltage at 1 V with external resistor from ILIM to ground. |
| 11 | TS | input | Analog temperature qualification voltage input; connect negative temperature coefficient thermistor to monitor battery temperature; charge suspends when out of range. |
| 12 | QON | input | BATFET enable control in shipping mode; logic low-to-high transition with minimum 2 ms high level turns on BATFET to exit shipping mode. |
| 13 | BAT | power_in | Battery connection point to positive pin of battery pack; internal BATFET is connected between BAT and SYS. |
| 14 | BAT | power_in | Battery connection point to positive pin of battery pack; internal BATFET is connected between BAT and SYS. |
| 15 | SYS | power_in | System connection point; internal BATFET is connected between BAT and SYS; switch-mode converter maintains SYS above minimum system voltage setting when battery drops below threshold. |
| 16 | SYS | power_in | System connection point; internal BATFET is connected between BAT and SYS; switch-mode converter maintains SYS above minimum system voltage setting when battery drops below threshold. |
| 17 | PGND | power_in | Power ground connection for high-current power converter node; internally connected to source of n-channel LSFET; connect directly to ground of input and output capacitors. |
| 18 | PGND | power_in | Power ground connection for high-current power converter node; internally connected to source of n-channel LSFET; connect directly to ground of input and output capacitors. |
| 19 | SW | output | Switching node connecting to output inductor; internally connected to source of n-channel HSFET and drain of n-channel LSFET. |
| 20 | SW | output | Switching node connecting to output inductor; internally connected to source of n-channel HSFET and drain of n-channel LSFET. |
| 21 | BTST | power_out | PWM high-side driver positive supply output; internally connected to anode of bootstrap diode; connect 0.047-µF bootstrap capacitor from SW to BTST. |
| 22 | REGN | power_out | PWM low-side driver positive supply output; internally connected to cathode of bootstrap diode; serves as bias rail for TS pin. |
| 23 | PMID | output | Connected to drain of reverse-blocking MOSFET and drain of high-side MOSFET; requires 8.2 µF or more capacitance from PMID to PGND. |
| 24 | VBUS | power_in | Charger input voltage; internal n-channel reverse-blocking MOSFET (RBFET) is connected between VBUS and PMID with VBUS on source. |
| 25 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-24-EP(4x4) |
| Category | Power Management (PMIC) |
| Pins | 25 |

## CAD (KiCad official)

- Symbol: `BQ24259RGER`
- Footprint: `Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm`
- 3D model: VQFN-24-EP(4x4) (KiCad packages3D, STEP)
- 3D model files: `bq24259rger-etched.step` / `bq24259rger-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `bq24259rger.step` / `bq24259rger.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/bq24259) (49 pp, sha256 `32cbff192784f69a`, retrieved 2026-09-22, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/bq24259rger-datasheet.pdf)