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Initial commit: component/bq24253rger

Ray ·5268fe6007 ·
2 files changed +322
README.mdadded+62
@@ -0,0 +1,62 @@+# BQ24253RGER++**Texas Instruments** · Battery Management · VQFN-24-EP(4x4)++BQ24253RGER from Texas Instruments, in a VQFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | CE | input | Charge Enable Active-Low Input; logic high places charger in standby mode by disabling the battery FET. |+| 2 | D+ | input | BC1.2 compatible D+ adapter detection input supporting DCP, SDP, CDP, Apple, and TomTom adapter detection. |+| 3 | D- | input | BC1.2 compatible D- adapter detection input supporting DCP, SDP, CDP, Apple, and TomTom adapter detection. |+| 4 | AGND | power_in | Analog Ground for QFN package only; connect to thermal pad and ground plane of circuit. |+| 5 | EN1 | input | Input Current Limit Configuration Input; use EN1 with EN2 to control maximum input current and enable USB compliance per Table 1. |+| 6 | EN2 | input | Input Current Limit Configuration Input; use EN2 with EN1 to control maximum input current and enable USB compliance per Table 1. |+| 7 | CHG | tri_state | Charge Status Open Drain Output; pulled low when charge cycle starts and remains low during charging; high impedance when complete or disabled. |+| 8 | PG | tri_state | Power Good Open Drain Output; pulled low when valid supply (VBAT+VSLP to VOVP) is connected to IN; high impedance otherwise. |+| 9 | TS | input | Battery Pack NTC Temperature Monitor Input; connect TS to center tap of resistor divider from LDO to GND with NTC from TS to GND for JEITA monitoring. |+| 10 | ISET | input | Charge Current Programming Input; connect resistor from ISET to GND to program fast charge current from 300mA to 2A. |+| 11 | BAT | bidirectional | Battery Connection carrying charge/discharge current; connect to positive battery terminal and bypass with >1μF capacitor. |+| 12 | BAT | bidirectional | Battery Connection carrying charge/discharge current; connect to positive battery terminal and bypass with >1μF capacitor. |+| 13 | SYS | power_out | System Power Output and SMPS voltage sense point; connect to system output at bulk capacitors and bypass locally with >20μF. |+| 14 | SYS | power_out | System Power Output and SMPS voltage sense point; connect to system output at bulk capacitors and bypass locally with >20μF. |+| 15 | PGND | power_in | Power Ground terminal; connect to ground plane of circuit. |+| 16 | PGND | power_in | Power Ground terminal; connect to ground plane of circuit. |+| 17 | SW | output | Buck Converter Switch Output; connect to switching side of external inductor for PWM converter operation. |+| 18 | SW | output | Buck Converter Switch Output; connect to switching side of external inductor for PWM converter operation. |+| 19 | IN | power_in | Input Power Supply from AC adapter or USB port (4.35V to 10.5V); bypass to PGND with >2μF ceramic capacitor. |+| 20 | PMID | output | Intermediate voltage node connection between blocking FET and high-side FET in buck converter. |+| 21 | BOOT | power_out | High-Side MOSFET Gate Driver Supply; connect 0.033μF ceramic capacitor (voltage rating >15V) from BOOT to SW for gate drive. |+| 22 | ILIM | input | Input Current Limit Programming Input; connect resistor from ILIM to GND to program input limit from 0.5A to 2A (short for 2A default). |+| 23 | VDPM | input | Input VIN_DPM Threshold Programming Input; connect resistor divider between IN and GND with VDPM at center tap (1.2V reference) for DPM setting (short for 4.68V default). |+| 24 | LDO | power_out | LDO regulated output providing up to 50mA at 4.9V when VUVLO < VIN <18V; bypass with 1μF ceramic capacitor. |+| 25 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | VQFN-24-EP(4x4) |+| Category | Power Management (PMIC) |+| Pins | 25 |++## CAD (KiCad official)++- Symbol: `BQ24253RGER`+- Footprint: `Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.7x2.7mm`+- 3D model: VQFN-24-EP(4x4) (KiCad packages3D, STEP)+- 3D model files: `bq24253rger-etched.step` / `bq24253rger-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `bq24253rger.step` / `bq24253rger.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/bq24253) (58 pp, sha256 `ec309ffe1d694e7f`, retrieved 2026-09-27, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-4-6` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/bq24253rger-datasheet.pdf)
page.jsonadded+260
@@ -0,0 +1,260 @@+{+  "slug": "bq24253rger",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments Battery Management, VQFN-24-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "power management (pmic)",+    "bq24253rger",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "bq24253rger.kicad_sym",+    "bq24253rger.kicad_mod",+    "bq24253rger.glb",+    "bq24253rger.step",+    "bq24253rger.lbr",+    "docs/hero.png",+    "docs/bq24253rger-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "component": {+    "mpn": "BQ24253RGER",+    "manufacturer": "Texas Instruments",+    "package": "VQFN-24-EP(4x4)",+    "pin_count": 25,+    "category": "Power Management (PMIC)",+    "subcategory": "Battery Management",+    "datasheet": "https://www.ti.com/cn/lit/gpn/bq24253",+    "parts": {+      "symbol": "bq24253rger.kicad_sym",+      "footprint": "bq24253rger.kicad_mod",+      "model_3d": "bq24253rger-etched.glb",+      "model_3d_plain": "bq24253rger.glb",+      "model_3d_step": "bq24253rger-etched.step",+      "model_3d_step_plain": "bq24253rger.step",+      "lbr": "bq24253rger.lbr"+    },+    "distributor_links": {+      "lcsc": "C2864881",+      "digikey": "296-BQ24253RGERTR-ND",+      "mouser": "595-BQ24253RGER"+    },+    "distributor_check": {+      "checked_at": "2026-09-27T02:58:23Z",+      "source": "Component Ocean /api/assign-pns",+      "digikey": {+        "pn": "296-BQ24253RGERTR-ND",+        "status": "found",+        "lifecycle": "Active"+      },+      "mouser": {+        "pn": "595-BQ24253RGER",+        "status": "found"+      }+    },+    "pins": [+      {+        "number": "1",+        "name": "CE",+        "type": "input",+        "description": "Charge Enable Active-Low Input; logic high places charger in standby mode by disabling the battery FET."+      },+      {+        "number": "2",+        "name": "D+",+        "type": "input",+        "description": "BC1.2 compatible D+ adapter detection input supporting DCP, SDP, CDP, Apple, and TomTom adapter detection."+      },+      {+        "number": "3",+        "name": "D-",+        "type": "input",+        "description": "BC1.2 compatible D- adapter detection input supporting DCP, SDP, CDP, Apple, and TomTom adapter detection."+      },+      {+        "number": "4",+        "name": "AGND",+        "type": "power_in",+        "description": "Analog Ground for QFN package only; connect to thermal pad and ground plane of circuit."+      },+      {+        "number": "5",+        "name": "EN1",+        "type": "input",+        "description": "Input Current Limit Configuration Input; use EN1 with EN2 to control maximum input current and enable USB compliance per Table 1."+      },+      {+        "number": "6",+        "name": "EN2",+        "type": "input",+        "description": "Input Current Limit Configuration Input; use EN2 with EN1 to control maximum input current and enable USB compliance per Table 1."+      },+      {+        "number": "7",+        "name": "CHG",+        "type": "tri_state",+        "description": "Charge Status Open Drain Output; pulled low when charge cycle starts and remains low during charging; high impedance when complete or disabled."+      },+      {+        "number": "8",+        "name": "PG",+        "type": "tri_state",+        "description": "Power Good Open Drain Output; pulled low when valid supply (VBAT+VSLP to VOVP) is connected to IN; high impedance otherwise."+      },+      {+        "number": "9",+        "name": "TS",+        "type": "input",+        "description": "Battery Pack NTC Temperature Monitor Input; connect TS to center tap of resistor divider from LDO to GND with NTC from TS to GND for JEITA monitoring."+      },+      {+        "number": "10",+        "name": "ISET",+        "type": "input",+        "description": "Charge Current Programming Input; connect resistor from ISET to GND to program fast charge current from 300mA to 2A."+      },+      {+        "number": "11",+        "name": "BAT",+        "type": "bidirectional",+        "description": "Battery Connection carrying charge/discharge current; connect to positive battery terminal and bypass with >1μF capacitor."+      },+      {+        "number": "12",+        "name": "BAT",+        "type": "bidirectional",+        "description": "Battery Connection carrying charge/discharge current; connect to positive battery terminal and bypass with >1μF capacitor."+      },+      {+        "number": "13",+        "name": "SYS",+        "type": "power_out",+        "description": "System Power Output and SMPS voltage sense point; connect to system output at bulk capacitors and bypass locally with >20μF."+      },+      {+        "number": "14",+        "name": "SYS",+        "type": "power_out",+        "description": "System Power Output and SMPS voltage sense point; connect to system output at bulk capacitors and bypass locally with >20μF."+      },+      {+        "number": "15",+        "name": "PGND",+        "type": "power_in",+        "description": "Power Ground terminal; connect to ground plane of circuit."+      },+      {+        "number": "16",+        "name": "PGND",+        "type": "power_in",+        "description": "Power Ground terminal; connect to ground plane of circuit."+      },+      {+        "number": "17",+        "name": "SW",+        "type": "output",+        "description": "Buck Converter Switch Output; connect to switching side of external inductor for PWM converter operation."+      },+      {+        "number": "18",+        "name": "SW",+        "type": "output",+        "description": "Buck Converter Switch Output; connect to switching side of external inductor for PWM converter operation."+      },+      {+        "number": "19",+        "name": "IN",+        "type": "power_in",+        "description": "Input Power Supply from AC adapter or USB port (4.35V to 10.5V); bypass to PGND with >2μF ceramic capacitor."+      },+      {+        "number": "20",+        "name": "PMID",+        "type": "output",+        "description": "Intermediate voltage node connection between blocking FET and high-side FET in buck converter."+      },+      {+        "number": "21",+        "name": "BOOT",+        "type": "power_out",+        "description": "High-Side MOSFET Gate Driver Supply; connect 0.033μF ceramic capacitor (voltage rating >15V) from BOOT to SW for gate drive."+      },+      {+        "number": "22",+        "name": "ILIM",+        "type": "input",+        "description": "Input Current Limit Programming Input; connect resistor from ILIM to GND to program input limit from 0.5A to 2A (short for 2A default)."+      },+      {+        "number": "23",+        "name": "VDPM",+        "type": "input",+        "description": "Input VIN_DPM Threshold Programming Input; connect resistor divider between IN and GND with VDPM at center tap (1.2V reference) for DPM setting (short for 4.68V default)."+      },+      {+        "number": "24",+        "name": "LDO",+        "type": "power_out",+        "description": "LDO regulated output providing up to 50mA at 4.9V when VUVLO < VIN <18V; bypass with 1μF ceramic capacitor."+      },+      {+        "number": "25",+        "name": "EP",+        "type": "passive",+        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.2",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.2",+        "primary_model": "claude-haiku-4-5-20251001",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-4-6",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [+          "exposed pad 25 added from the footprint"+        ],+        "pages_sent": 58,+        "cost_usd": 0.8867,+        "at": "2026-09-27T02:58:06"+      },+      "datasheet": {+        "url": "https://www.ti.com/cn/lit/gpn/bq24253",+        "pages": 58,+        "sha256": "ec309ffe1d694e7f",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 25,+        "described": 25,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file