component
BQ24196RGER
Public Made by Adomby adom
Texas Instruments Battery Management, VQFN-24-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+62@@ -0,0 +1,62 @@+# BQ24196RGER++**Texas Instruments** · Battery Management · VQFN-24-EP(4x4)++BQ24196RGER from Texas Instruments, in a VQFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VBUS | power_in | Charger Input Voltage with internal n-channel reverse block MOSFET (RBFET) connected between VBUS source and PMID; place 1-µF ceramic capacitor from VBUS to PGND close to IC. |+| 2 | PSEL | input | Power source selection input; High indicates USB host source and Low indicates adapter source. |+| 3 | PG | output | Open drain active low power good indicator; connect to pull-up rail via 10-kΩ resistor; LOW indicates good input source when input voltage between UVLO and ACOV, above SLEEP mode threshold, and current limit above 30 mA. |+| 4 | STAT | output | Open drain charge status output to indicate charger operation; connect to pull-up rail via 10-kΩ resistor; LOW indicates charge in progress, HIGH indicates charge complete or disabled, blinking at 1 Hz for fault conditions. |+| 5 | SCL | input | I2C Interface clock; connect SCL to logic rail through 10-kΩ resistor; supports standard mode up to 100 kbits and fast mode up to 400 kbits. |+| 6 | SDA | bidirectional | I2C Interface data; connect SDA to logic rail through 10-kΩ resistor; open drain pin used for bidirectional communication. |+| 7 | INT | output | Open-drain Interrupt Output; connect INT to logic rail via 10-kΩ resistor; sends active low 256-us pulse to host to report charger device status and fault conditions. |+| 8 | OTG | input | USB current limit selection pin during buck mode and active high enable pin during boost mode; in buck mode with USB host (PSEL=High), when OTG=High, IIN limit=500 mA, when OTG=Low, IIN limit=100 mA; boost mode activated when REG01[5:4]=10 and OTG=High. |+| 9 | CE | input | Active low Charge Enable pin; battery charging is enabled when REG01[5:4]=01 and CE pin=Low; CE pin must be pulled high or low. |+| 10 | ILIM | input | Input current limit selection pin; sets maximum input current limit by regulating ILIM voltage at 1V using resistor from ILIM pin to ground; INMAX=(1V/RILIM)×530; actual input current limit is lower value set by ILIM and I2C REG00[2:0]; minimum input current is 500 mA. |+| 11 | TS1 | input | Temperature qualification voltage input #1; connect negative temperature coefficient thermistor; program temperature window with resistor divider from REGN to TS1 to GND; charge suspends when TS pin is out of range; recommend 103AT-2 thermistor. |+| 12 | TS2 | input | Temperature qualification voltage input #2; connect negative temperature coefficient thermistor; program temperature window with resistor divider from REGN to TS2 to GND; charge suspends when TS pin is out of range; TS1 and TS2 can be connected together for single thermistor application. |+| 13 | BAT | power_in | Battery connection point to positive terminal of battery pack; internal BATFET connected between BAT and SYS; connect 10 µF capacitor closely to BAT pin. |+| 14 | BAT | power_in | Battery connection point to positive terminal of battery pack; duplicate pin for current distribution; internal BATFET connected between BAT and SYS. |+| 15 | SYS | power_in | System connection point; internal BATFET connected between BAT and SYS; when battery falls below minimum system voltage, switch-mode converter keeps SYS above minimum system voltage setting. |+| 16 | SYS | power_in | System connection point; duplicate pin for current distribution; internal BATFET connected between BAT and SYS. |+| 17 | PGND | power_in | Power ground connection for high-current power converter node; internally connected to source of n-channel LSFET; connect directly to ground connection of input and output capacitors; single point connection recommended between power PGND and analog GND near IC. |+| 18 | PGND | power_in | Power ground connection; duplicate pin for current distribution; internally connected to source of n-channel LSFET. |+| 19 | SW | output | Switching node connecting to output inductor; internally connected to source of n-channel HSFET and drain of n-channel LSFET; connect 0.047-µF bootstrap capacitor from SW to BTST. |+| 20 | SW | output | Switching node; duplicate pin for current distribution; internally connected to source of n-channel HSFET and drain of n-channel LSFET. |+| 21 | BTST | power_in | PWM high side driver positive supply; internally connected to anode of bootstrap diode; connect 0.047-µF bootstrap capacitor from SW to BTST. |+| 22 | REGN | power_in | PWM low side driver positive supply output; internally connected to cathode of bootstrap diode; connect 4.7-µF (10-V rating) ceramic capacitor from REGN to analog GND close to IC; also serves as bias rail for TS1 and TS2 pins. |+| 23 | PMID | output | Connected to drain of reverse blocking MOSFET and drain of HSFET; given total input capacitance, connect 1-µF capacitor on VBUS to PGND and rest on PMID to PGND. |+| 24 | VBUS | power_in | Charger Input Voltage; duplicate pin for current distribution; internal n-channel reverse block MOSFET (RBFET) connected to VBUS. |+| 25 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | VQFN-24-EP(4x4) |+| Category | Power Management (PMIC) |+| Pins | 25 |++## CAD (KiCad official)++- Symbol: `BQ24196RGER`+- Footprint: `Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm`+- 3D model: VQFN-24-EP(4x4) (KiCad packages3D, STEP)+- 3D model files: `bq24196rger-etched.step` / `bq24196rger-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `bq24196rger.step` / `bq24196rger.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/bq24196) (51 pp, sha256 `e6d0c7f6f4a1a193`, retrieved 2026-09-24, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/bq24196rger-datasheet.pdf)
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place 1-µF ceramic capacitor from VBUS to PGND close to IC."+ },+ {+ "number": "2",+ "name": "PSEL",+ "type": "input",+ "description": "Power source selection input; High indicates USB host source and Low indicates adapter source."+ },+ {+ "number": "3",+ "name": "PG",+ "type": "output",+ "description": "Open drain active low power good indicator; connect to pull-up rail via 10-kΩ resistor; LOW indicates good input source when input voltage between UVLO and ACOV, above SLEEP mode threshold, and current limit above 30 mA."+ },+ {+ "number": "4",+ "name": "STAT",+ "type": "output",+ "description": "Open drain charge status output to indicate charger operation; connect to pull-up rail via 10-kΩ resistor; LOW indicates charge in progress, HIGH indicates charge complete or disabled, blinking at 1 Hz for fault conditions."+ },+ {+ "number": "5",+ "name": "SCL",+ "type": "input",+ "description": "I2C Interface clock; connect SCL to logic rail through 10-kΩ resistor; supports standard mode up to 100 kbits and fast mode up to 400 kbits."+ },+ {+ "number": "6",+ "name": "SDA",+ "type": "bidirectional",+ "description": "I2C Interface data; connect SDA to logic rail through 10-kΩ resistor; open drain pin used for bidirectional communication."+ },+ {+ "number": "7",+ "name": "INT",+ "type": "output",+ "description": "Open-drain Interrupt Output; connect INT to logic rail via 10-kΩ resistor; sends active low 256-us pulse to host to report charger device status and fault conditions."+ },+ {+ "number": "8",+ "name": "OTG",+ "type": "input",+ "description": "USB current limit selection pin during buck mode and active high enable pin during boost mode; in buck mode with USB host (PSEL=High), when OTG=High, IIN limit=500 mA, when OTG=Low, IIN limit=100 mA; boost mode activated when REG01[5:4]=10 and OTG=High."+ },+ {+ "number": "9",+ "name": "CE",+ "type": "input",+ "description": "Active low Charge Enable pin; battery charging is enabled when REG01[5:4]=01 and CE pin=Low; CE pin must be pulled high or low."+ },+ {+ "number": "10",+ "name": "ILIM",+ "type": "input",+ "description": "Input current limit selection pin; sets maximum input current limit by regulating ILIM voltage at 1V using resistor from ILIM pin to ground; INMAX=(1V/RILIM)×530; actual input current limit is lower value set by ILIM and I2C REG00[2:0]; minimum input current is 500 mA."+ },+ {+ "number": "11",+ "name": "TS1",+ "type": "input",+ "description": "Temperature qualification voltage input #1; connect negative temperature coefficient thermistor; program temperature window with resistor divider from REGN to TS1 to GND; charge suspends when TS pin is out of range; recommend 103AT-2 thermistor."+ },+ {+ "number": "12",+ "name": "TS2",+ "type": "input",+ "description": "Temperature qualification voltage input #2; connect negative temperature coefficient thermistor; program temperature window with resistor divider from REGN to TS2 to GND; charge suspends when TS pin is out of range; TS1 and TS2 can be connected together for single thermistor application."+ },+ {+ "number": "13",+ "name": "BAT",+ "type": "power_in",+ "description": "Battery connection point to positive terminal of battery pack; internal BATFET connected between BAT and SYS; connect 10 µF capacitor closely to BAT pin."+ },+ {+ "number": "14",+ "name": "BAT",+ "type": "power_in",+ "description": "Battery connection point to positive terminal of battery pack; duplicate pin for current distribution; internal BATFET connected between BAT and SYS."+ },+ {+ "number": "15",+ "name": "SYS",+ "type": "power_in",+ "description": "System connection point; internal BATFET connected between BAT and SYS; when battery falls below minimum system voltage, switch-mode converter keeps SYS above minimum system voltage setting."+ },+ {+ "number": "16",+ "name": "SYS",+ "type": "power_in",+ "description": "System connection point; duplicate pin for current distribution; internal BATFET connected between BAT and SYS."+ },+ {+ "number": "17",+ "name": "PGND",+ "type": "power_in",+ "description": "Power ground connection for high-current power converter node; internally connected to source of n-channel LSFET; connect directly to ground connection of input and output capacitors; single point connection recommended between power PGND and analog GND near IC."+ },+ {+ "number": "18",+ "name": "PGND",+ "type": "power_in",+ "description": "Power ground connection; duplicate pin for current distribution; internally connected to source of n-channel LSFET."+ },+ {+ "number": "19",+ "name": "SW",+ "type": "output",+ "description": "Switching node connecting to output inductor; internally connected to source of n-channel HSFET and drain of n-channel LSFET; connect 0.047-µF bootstrap capacitor from SW to BTST."+ },+ {+ "number": "20",+ "name": "SW",+ "type": "output",+ "description": "Switching node; duplicate pin for current distribution; internally connected to source of n-channel HSFET and drain of n-channel LSFET."+ },+ {+ "number": "21",+ "name": "BTST",+ "type": "power_in",+ "description": "PWM high side driver positive supply; internally connected to anode of bootstrap diode; connect 0.047-µF bootstrap capacitor from SW to BTST."+ },+ {+ "number": "22",+ "name": "REGN",+ "type": "power_in",+ "description": "PWM low side driver positive supply output; internally connected to cathode of bootstrap diode; connect 4.7-µF (10-V rating) ceramic capacitor from REGN to analog GND close to IC; also serves as bias rail for TS1 and TS2 pins."+ },+ {+ "number": "23",+ "name": "PMID",+ "type": "output",+ "description": "Connected to drain of reverse blocking MOSFET and drain of HSFET; given total input capacitance, connect 1-µF capacitor on VBUS to PGND and rest on PMID to PGND."+ },+ {+ "number": "24",+ "name": "VBUS",+ "type": "power_in",+ "description": "Charger Input Voltage; duplicate pin for current distribution; internal n-channel reverse block MOSFET (RBFET) connected to VBUS."+ },+ {+ "number": "25",+ "name": "EP",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.2",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.2",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "exposed pad 25 added from the footprint"+ ],+ "pages_sent": 51,+ "cost_usd": 0.5764,+ "at": "2026-09-24T02:23:04"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/bq24196",+ "pages": 51,+ "sha256": "e6d0c7f6f4a1a193",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 25,+ "described": 25,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}