component
BQ24192RGER
Public Made by Adomby adom
Texas Instruments Battery Management, VQFN-24-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads on click. Unloads only if this page sits in the background.
PCB Footprint
Open full view ↗Loads on click. Unloads only if this page sits in the background.
Datasheet
Open in new tab ↗Loads on click. Unloads only if this page sits in the background.
README
markdownBQ24192RGER
Texas Instruments · Battery Management · VQFN-24-EP(4x4)
BQ24192RGER from Texas Instruments, in a VQFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VBUS | power_in | Charger input voltage; place 1-µF ceramic capacitor close to IC from VBUS to PGND. |
| 2 | PSEL | input | Power source selection input; High indicates USB host source, Low indicates adapter source. |
| 3 | PG | output | Open-drain active-low power good indicator; LOW when input voltage between UVLO and ACOV above SLEEP threshold and current limit above 30 mA. |
| 4 | STAT | output | Open-drain charge status output; LOW indicates charge in progress, HIGH indicates charge complete or disabled. |
| 5 | SCL | input | I2C interface clock; connect through 10-kΩ pull-up resistor to logic rail. |
| 6 | SDA | bidirectional | I2C interface data line; connect through 10-kΩ pull-up resistor to logic rail. |
| 7 | INT | output | Open-drain interrupt output; sends active-low 256-µs pulse to host to report charger status and faults. |
| 8 | OTG | input | USB current limit selection during buck mode; High sets IIN to 500 mA or enables boost mode, Low sets IIN to 100 mA. |
| 9 | CE | input | Active-low charge enable; battery charging enabled when REG01[5:4] = 01 and CE is Low. |
| 10 | ILIM | input | Input current limit setting; connect resistor to ground to set maximum limit as IINMAX = (1V/RILIM) × 530 with minimum 500 mA. |
| 11 | TS1 | input | Temperature sensor input 1; connect negative temperature coefficient thermistor with resistor divider from REGN to TS1 to ground. |
| 12 | TS2 | input | Temperature sensor input 2; connect negative temperature coefficient thermistor with resistor divider from REGN to TS2 to ground. |
| 13 | BAT | power_in | Battery positive connection point; internal BATFET connected between BAT and SYS; connect 10-µF capacitor closely to pin. |
| 14 | BAT | power_in | Battery positive connection point; internal BATFET connected between BAT and SYS; connect 10-µF capacitor closely to pin. |
| 15 | SYS | power_out | System output connection point; converter maintains SYS above minimum system voltage setting when battery falls below minimum. |
| 16 | SYS | power_out | System output connection point; converter maintains SYS above minimum system voltage setting when battery falls below minimum. |
| 17 | PGND | power_in | Power ground connection for high-current power converter; connect directly to ground of input and output capacitors. |
| 18 | PGND | power_in | Power ground connection for high-current power converter; connect directly to ground of input and output capacitors. |
| 19 | SW | output | Switching node connecting to output inductor; connect 0.047-µF bootstrap capacitor from SW to BTST. |
| 20 | SW | output | Switching node connecting to output inductor; connect 0.047-µF bootstrap capacitor from SW to BTST. |
| 21 | BTST | power_in | PWM high-side driver positive supply; internally connected to boost-strap diode anode; connect 0.047-µF bootstrap capacitor from SW. |
| 22 | REGN | power_out | PWM low-side driver positive supply output; connect 4.7-µF (10V rating) ceramic capacitor from REGN to analog ground close to IC. |
| 23 | PMID | output | Internal node connected to drain of reverse blocking MOSFET and drain of high-side FET; place 1-µF capacitor on VBUS to PGND and remaining on PMID to PGND. |
| 24 | VBUS | power_in | Charger input voltage; place 1-µF ceramic capacitor close to IC from VBUS to PGND. |
| 25 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-24-EP(4x4) |
| Category | Power Management (PMIC) |
| Pins | 25 |
CAD (KiCad official)
- Symbol:
BQ24192RGER - Footprint:
Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.7x2.7mm - 3D model: VQFN-24-EP(4x4) (KiCad packages3D, STEP)
- 3D model files:
bq24192rger-etched.step/bq24192rger-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);bq24192rger.step/bq24192rger.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (53 pp, sha256
5ad60e02bb956906, retrieved 2026-09-26, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-4-6(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).