# BQ24075QRGTRQ1

**Texas Instruments** · Battery Management ICs · VQFN-16-EP(3x3)

BQ24075QRGTRQ1 from Texas Instruments, in a VQFN-16-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | TS | input | TS monitors a 10kΩ NTC thermistor in the battery pack, and a 10kΩ fixed resistor from TS to VSS is required when the TS function is unused to hold a valid voltage level. |
| 2 | BAT | bidirectional | BAT is the charger power stage output and battery voltage sense input, and must be bypassed to VSS with a 4.7 μF to 47 μF ceramic capacitor. |
| 3 | BAT | bidirectional | BAT is the charger power stage output and battery voltage sense input, and must be bypassed to VSS with a 4.7 μF to 47 μF ceramic capacitor. |
| 4 | CE | input | CE is an active-low charge enable input that must be tied to a defined logic level, since leaving it unconnected is not allowed and it is internally pulled down with about 285 kΩ. |
| 5 | EN2 | input | EN2 together with EN1 sets the maximum input current and enables USB compliance, and must not be left unconnected because it is internally pulled down with about 285 kΩ. |
| 6 | EN1 | input | EN1 together with EN2 sets the maximum input current and enables USB compliance, and must not be left unconnected because it is internally pulled down with about 285 kΩ. |
| 7 | PGOOD | output | PGOOD is an open-drain power good output that pulls to VSS when a valid input source is detected and is connected to a logic rail through a 1kΩ-100kΩ resistor. |
| 8 | VSS | power_in | VSS is the ground pin that must be connected to the thermal pad and to the ground rail of the circuit, and it must be connected to ground at all times. |
| 9 | CHG | output | CHG is an open-drain charging status output that pulls to VSS while the battery is charging and is connected to a logic rail through a 1kΩ-100kΩ resistor. |
| 10 | OUT | output | OUT is the regulated system supply output that must be bypassed to VSS with a 4.7 μF to 47 μF ceramic capacitor. |
| 11 | OUT | output | OUT is the regulated system supply output that must be bypassed to VSS with a 4.7 μF to 47 μF ceramic capacitor. |
| 12 | ILIM | input | ILIM programs the maximum input current through a 1100 Ω to 8 kΩ resistor to VSS when EN2=1 and EN1=0, and leaving it unconnected disables all charging. |
| 13 | IN | power_in | IN is the input power connection with an operating range of 4.35V to 6.6V, accepts up to 26V without damage but suspends operation, and requires a 1 μF to 10 μF bypass capacitor to VSS. |
| 14 | TMR | input | TMR programs the pre-charge and fast-charge safety timers with an 18 kΩ to 72 kΩ resistor to VSS, disables all safety timers when connected to VSS, and sets default values when left unconnected. |
| 15 | SYSOFF | input | SYSOFF high turns off the FET connecting the battery to the system output and disables charging when an adapter is connected, and it must not be left unconnected because it is internally pulled up to VBAT through about 5 MΩ. |
| 16 | ISET | bidirectional | ISET programs the fast charge current through a 590 Ω to 3 kΩ resistor to VSS, is disabled if left unconnected, and its voltage reflects the actual charging current while charging. |
| 17 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-16-EP(3x3) |
| Category | Power Supply Chip |
| Pins | 17 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| IN voltage range | VI | 4.35 |  | 26 | V |  | 3 |
| IN operating voltage range | VI | 4.35 |  | 6.4 | V |  | 3 |
| Input current, IN pin | IIN |  |  | 1.5 | A |  | 3 |
| Current, OUT pin | IOUT |  |  | 4.5 | A |  | 3 |
| Current, BAT pin (Discharging) | IBAT |  |  | 4.5 | A |  | 3 |
| Current, BAT pin (Charging) | ICHG |  |  | 1.5 | A | Footnote 1: charge life reduced at 1.5A and 125°C | 3 |
| Maximum input current programming resistor | RILIM | 1100 |  | 8000 | Ω |  | 3 |
| Fast-charge current programming resistor | RISET | 590 |  | 3000 | Ω | Use 1% tolerance resistor | 3 |
| Termination current programming resistor | RITERM | 0 |  | 15 | kΩ |  | 3 |
| Timer programming resistor | RTMR | 18 |  | 72 | kΩ |  | 3 |
| IN voltage (with respect to VSS) | VI | -0.3 |  | 28 | V | with respect to VSS | 2 |
| BAT voltage (with respect to VSS) | VI | -0.3 |  | 5 | V | with respect to VSS | 2 |
| Input voltage OUT, EN1, EN2, CE, TS, ISET, PGOOD, CHG, ILIM, TMR, SYSOFF | VI | -0.3 |  | 7 | V |  | 2 |
| Input current IN | II |  |  | 1.6 | A |  | 2 |
| Output current OUT | IO |  |  | 5 | A | Continuous | 2 |
| Output current BAT (discharge mode) | IO |  |  | 5 | A | Continuous | 2 |
| Output current BAT (charging mode) | IO |  |  | 1.5 | A | Continuous | 2 |
| Output sink current CHG, PGOOD |  |  |  | 15 | mA |  | 2 |
| Junction temperature | TJ | -40 |  | 150 | °C |  | 2 |
| Storage temperature | Tstg | -65 |  | 150 | °C |  | 2 |
| Electrostatic discharge HBM (QSS 009-105) |  |  |  | 1.5 | kV | JESD22-A114A | 2 |
| ESD Human Body Model (AEC-Q100 H2) |  |  |  | 2 | kV | AEC-Q100 Classification Level H2 | 2 |
| ESD Charged Device Model (AEC-Q100 C3B) |  |  |  | 750 | V | AEC-Q100 Classification Level C3B | 2 |
| Junction-to-ambient thermal resistance | θJA |  | 45.8 |  | °C/W | RGT 16-pin | 3 |
| Junction-to-case (top) thermal resistance | θJCtop |  | 53.6 |  | °C/W | RGT 16-pin | 3 |
| Junction-to-board thermal resistance | θJB |  | 18.1 |  | °C/W | RGT 16-pin | 3 |
| Junction-to-case (bottom) thermal resistance | θJCbot |  | 5.2 |  | °C/W | RGT 16-pin | 3 |
| Junction-to-top characterization parameter | ψJT |  | 1.1 |  | °C/W | RGT 16-pin | 3 |
| Junction-to-board characterization parameter | ψJB |  | 18 |  | °C/W | RGT 16-pin | 3 |
| Undervoltage lock-out | UVLO | 3.2 | 3.3 | 3.4 | V | VIN: 0 V → 4 V | 4 |
| Hysteresis on UVLO | Vhys |  | 200 | 300 | mV | VIN: 4 V → 0 V | 4 |
| Input power detection threshold | VIN(DT) | 50 | 80 | 135 | mV | VBAT = 3.6 V, VIN: 3.5 V → 4 V | 4 |
| Input overvoltage protection threshold | VOVP | 6.4 | 6.6 | 6.8 | V | VIN: 5 V → 7 V | 4 |
| Output voltage regulation (OUT pin) | VO(REG) | 5.4 | 5.5 | 5.65 | V | VIN > VOUT + VDO(IN-OUT) | 4 |
| Dropout voltage VIN, VOUT | VDO(IN-OUT) |  | 300 | 475 | mV | VIN = 4.3 V, IIN = 1A, VBAT = 4.2V | 4 |
| Dropout voltage VBAT, VOUT | VDO(BAT-OUT) |  | 50 | 100 | mV | IOUT = 1 A, VIN = 0 V, VBAT > 3 V | 4 |
| Maximum input current (EN1 = LO, EN2 = LO) | IINmax | 85 | 95 | 100 | mA | EN1 = LO, EN2 = LO | 4 |
| Maximum input current (EN1 = HI, EN2 = LO) | IINmax | 440 | 475 | 500 | mA | EN1 = HI, EN2 = LO | 4 |
| Maximum input current factor (ILIM = 500 mA to 1.5 A) | KILIM | 1500 | 1610 | 1720 | AΩ | ILIM = 500mA to 1.5A | 4 |
| Maximum input current factor (ILIM = 200 mA to 500 mA) | KILIM | 1300 | 1525 | 1770 | AΩ | ILIM = 200mA to 500mA | 4 |
| Input voltage threshold when input current is reduced | VIN-DPM | 4.35 | 4.5 | 4.63 | V | EN2 = LO, EN1 = X | 4 |
| Output voltage threshold when charging current is reduced | VDPPM | 4.2 | 4.3 | 4.4 | V |  | 4 |
| Output short-circuit detection threshold, power-on | VO(SC1) | 0.8 | 0.9 | 1 | V | VIN > VUVLO and VIN > VBAT + VIN(DT) | 4 |
| Output short-circuit detection threshold, supplement mode | VO(SC2) | 200 | 250 | 300 | mV | VIN > VUVLO and VIN > VBAT + VIN(DT); VBAT, VOUT > VO(SC2) indicates short-circuit | 4 |
| Source current for BAT pin short-circuit detection | IBAT | 4 | 7.5 | 11 | mA | VBAT = 1.5V | 5 |
| BAT pin short-circuit detection threshold (VBAT rising) | VBAT(SC) | 1.6 | 1.8 | 2 | V | VBAT rising | 5 |
| Battery charge voltage | VBAT(REG) | 4.15 | 4.2 | 4.23 | V |  | 5 |
| Pre-charge to fast-charge transition threshold | VLOWV | 2.9 | 3 | 3.1 | V | VIN > VUVLO and VIN > VBAT + VIN(DT) | 5 |
| Battery fast charge current range | ICHG | 300 |  | 1500 | mA | VBAT > VLOWV, VIN = 5 V, CE = LO, EN1 = LO, EN2 = HI | 5 |
| Fast charge current factor | KISET | 797 | 890 | 975 | AΩ |  | 5 |
| Pre-charge current factor | KPRECHG | 55 | 88 | 110 | AΩ |  | 5 |
| Termination comparator detection threshold (internally set) | ITERM | 0.09 | 0.1 | 0.11 | ×ICHG | CE = LO, (EN1, EN2) ≠ (LO, LO), VBAT > VRCH, t < tMAXCH, VIN = 5 V, DPPM and thermal loop not active | 5 |
| Termination comparator detection threshold (EN1, EN2 = LO, LO) | ITERM | 0.027 | 0.033 | 0.04 | ×ICHG | CE = LO, (EN1, EN2) = (LO, LO), VBAT > VRCH, t < tMAXCH, VIN = 5 V, DPPM and thermal loop not active | 5 |
| Recharge detection threshold | VRCH | -140 | -100 | -55 | mV | Relative to VBAT(REG); VIN > VUVLO and VIN > VBAT + VIN(DT) | 5 |
| Sink current for battery detection | IBAT(DET) | 5 | 7.5 | 10 | mA | VBAT = 2.5V | 5 |
| Pre-charge safety timer value | tPRECHG | 1440 | 1800 | 2160 | s | TMR = floating | 5 |
| Charge safety timer value | tMAXCHG | 14400 | 18000 | 21600 | s | TMR = floating | 5 |
| Timer factor | KTMR | 36 | 48 | 60 | s/kΩ |  | 5 |
| NTC bias current | INTC | 72 | 75 | 80 | μA | VIN > UVLO and VIN > VBAT + VIN(DT) | 5 |
| High temperature trip point | VHOT | 270 | 300 | 330 | mV | Battery charging, VTS falling | 5 |
| Low temperature trip point | VCOLD | 2000 | 2100 | 2200 | mV | Battery charging, VTS rising | 5 |
| Logic LOW input voltage (EN1, EN2, CE, SYSOFF) | VIL | 0 |  | 0.4 | V |  | 6 |
| Logic HIGH input voltage (EN1, EN2, CE, SYSOFF) | VIH | 1.4 |  | 6 | V |  | 6 |
| Input sink current | IIL |  |  | 1 | μA | VIL = 0V | 6 |
| Input source current | IIH |  |  | 10 | μA | VIH = 1.4V | 6 |
| Output LOW voltage (PGOOD, CHG) | VOL |  |  | 0.4 | V | ISINK = 5 mA | 6 |
| Active supply current, IN pin | ICC |  |  | 1.5 | mA | CE = LO, VIN = 6 V, no load on OUT pin, VBAT > VBAT(REG), (EN1, EN2) ≠ (HI, HI) | 4 |
| Sleep current into BAT pin | IBAT(PDWN) |  | 12 |  | μA | CE = LO or HI, input power not detected, no load on OUT pin, Ta = 125°C | 4 |
| Internal pull-down resistance on CE | RCE |  | 285 |  | kΩ | CE internally pulled down | 6 |
| Internal pull-up resistance on SYSOFF to VBAT | RSYSOFF |  | 5 |  | MΩ | SYSOFF internally pulled up to VBAT | 6 |

## CAD (KiCad official)

- Symbol: `BQ24075QRGTRQ1`
- Footprint: `Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm`
- 3D model: VQFN-16-EP(3x3) (KiCad packages3D, STEP)
- 3D model files: `bq24075qrgtrq1-etched.step` / `bq24075qrgtrq1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `bq24075qrgtrq1.step` / `bq24075qrgtrq1.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/bq24075-q1) (39 pp, sha256 `e194cdc076180d34`, retrieved 2026-10-28, tier: manufacturer)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/bq24075qrgtrq1-datasheet.pdf)