BQ2205LYPWR

{
  "schema_version": 1,
  "type": "component",
  "slug": "bq2205lypwr",
  "title": "BQ2205LYPWR",
  "brief": "Texas Instruments SRAM, TSSOP-16. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "memory",
    "bq2205lypwr"
  ],
  "component": {
    "mpn": "BQ2205LYPWR",
    "manufacturer": "Texas Instruments",
    "package": "TSSOP-16",
    "pin_count": 16,
    "category": "Memory",
    "subcategory": "SRAM",
    "datasheet": "https://www.ti.com/lit/ds/symlink/bq2205ly.pdf",
    "parts": {
      "symbol": "bq2205lypwr.kicad_sym",
      "footprint": "bq2205lypwr.kicad_mod",
      "model_3d": "bq2205lypwr-etched.glb",
      "model_3d_plain": "bq2205lypwr.glb",
      "model_3d_step": "bq2205lypwr-etched.step",
      "model_3d_step_plain": "bq2205lypwr.step",
      "lbr": "bq2205lypwr.lbr"
    },
    "distributor_links": {},
    "pins": [
      {
        "number": "1",
        "name": "A",
        "type": "input",
        "description": "SRAM bank select input. Chooses which conditioned chip-enable output (CECON1 or CECON2) receives the CE input during power-valid operation. Typically tied to a high-order address line."
      },
      {
        "number": "2",
        "name": "NC",
        "type": "unconnected",
        "description": "No connect. Must be left floating."
      },
      {
        "number": "3",
        "name": "NC",
        "type": "unconnected",
        "description": "No connect. Must be left floating."
      },
      {
        "number": "4",
        "name": "VSS",
        "type": "power_in",
        "description": "Ground reference (0 V). All three VSS pins (4, 5, 8) should be tied to system ground; use a single-point ground technique to separate low-current small-signal ground from high-current supply ground."
      },
      {
        "number": "5",
        "name": "VSS",
        "type": "power_in",
        "description": "Ground reference (0 V). Tie to system ground together with pins 4 and 8."
      },
      {
        "number": "6",
        "name": "NC",
        "type": "unconnected",
        "description": "No connect. Must be left floating."
      },
      {
        "number": "7",
        "name": "NC",
        "type": "unconnected",
        "description": "No connect. Must be left floating."
      },
      {
        "number": "8",
        "name": "VSS",
        "type": "power_in",
        "description": "Ground reference (0 V). Tie to system ground together with pins 4 and 5."
      },
      {
        "number": "9",
        "name": "BCp",
        "type": "power_in",
        "description": "Backup battery cell input. Accepts a 3-V primary (non-rechargeable) lithium cell; VBC range 2.0 V to 4.0 V (absolute max 4.5 V wrt VSS). Sources VOUT when VCC drops below the switch-over threshold VSO. Typical backup current 50 nA (150 nA max)."
      },
      {
        "number": "10",
        "name": "CECON1",
        "type": "output",
        "description": "Conditioned chip-enable output 1 (active low). Drives CE of SRAM bank 1; forced inactive high during power-fail and for tCER after power-up. VOL 0.4 V at 2 mA, VOH 2.4 V at 0.5 mA."
      },
      {
        "number": "11",
        "name": "CE",
        "type": "input",
        "description": "Chip-enable input (active low) from the host processor. Passed through to CECON1 or CECON2 (selected by A) with less than 25 ns propagation delay when power is valid; blocked otherwise for write-protection."
      },
      {
        "number": "12",
        "name": "VCC",
        "type": "power_in",
        "description": "Main 3.3-V supply input (3.0 V to 3.6 V recommended, absolute max 6.0 V). Continuously monitored against VPFD (typ 2.9 V); power-fail below this threshold triggers write-protect and reset. Typical ICC 210 uA (500 uA max)."
      },
      {
        "number": "13",
        "name": "VOUT",
        "type": "power_out",
        "description": "Switched SRAM supply output. Sourced from VCC when power is valid (VCC-0.3 V at 80 mA) and from BCp during backup (VBC-0.3 V at 100 uA). Feeds the VCC pins of the external SRAM banks."
      },
      {
        "number": "14",
        "name": "CECON2",
        "type": "output",
        "description": "Conditioned chip-enable output 2 (active low). Drives CE of SRAM bank 2; forced inactive high during power-fail and for tCER after power-up. VOL 0.4 V at 2 mA, VOH 2.4 V at 0.5 mA."
      },
      {
        "number": "15",
        "name": "BW",
        "type": "output",
        "description": "Battery warning output, open-drain, active low. Latches the result of the battery-warning comparison (threshold 0.677 x VCC) after tCER on power-up; low indicates low battery. Requires an external pull-up to VCC. VOL 0.4 V at 1 mA."
      },
      {
        "number": "16",
        "name": "RST",
        "type": "output",
        "description": "Power-on/power-fail reset output to the system CPU, open-drain, active low. Held low while VCC < VPFD and for tRST (30-85 ms) after VCC returns above VPFD. External pull-up not to exceed 10 kohm when a push-button reset is used. VOL 0.4 V at 1 mA."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://www.ti.com/lit/ds/symlink/bq2205ly.pdf",
        "pages": 17,
        "sha256": "031dc3e4391ffd75",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 16,
        "described": 16,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "bq2205lypwr.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.4,
          5.0,
          1.1
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "6ad5e98224d02a427d9a6b929a28dbc158b9925fba5adec12db05079f1016948",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "bq2205lypwr-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.4,
          5.0,
          1.1
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "fa4e4904cd01d58b1e5cc312ccd5e6668220742305227094be53cf363f47a2b0",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "Texas Instruments",
      "Package": "TSSOP-16",
      "Category": "Memory",
      "Pins": "16"
    }
  },
  "variants": [
    {
      "mpn": "BQ2205LYPWR",
      "kind": "packaging"
    }
  ],
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "bq2205lypwr"
  ],
  "discovery_pitch": "BQ2205LYPWR (Texas Instruments) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "bq2205lypwr.kicad_sym",
    "bq2205lypwr.kicad_mod",
    "bq2205lypwr.glb",
    "bq2205lypwr.step",
    "bq2205lypwr.lbr",
    "docs/hero.png",
    "docs/bq2205lypwr-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html"
  ],
  "visibility": {
    "public": true
  },
  "updated_at": "2026-09-24T18:00:21.885Z"
}