component
BLUENRG-345AT
Public Made by Adomby adom
STMicroelectronics RF Transceiver ICs, QFN-32-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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BLUENRG-345AT
STMicroelectronics · RF Transceiver ICs · QFN-32-EP(5x5)
BLUENRG-345AT from STMicroelectronics, in a QFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PB3 | bidirectional | Bidirectional 5 V tolerant GPIO (FT_a) with wake-up, alternate functions USART_CTS, LPUART_TX and TIM1_CH4, and ADC input VINP0. |
| 2 | PB2 | bidirectional | Bidirectional 5 V tolerant GPIO (FT_a) with wake-up, alternate functions USART_RTS_DE, PDM_DATA and TIM1_CH3, and ADC input VINM0. |
| 3 | PB1 | bidirectional | Bidirectional 5 V tolerant GPIO (FT_a) with wake-up, alternate functions SPI1_NSS, PDM_CLK and TIM1_ETR, and ADC input VINP1. |
| 4 | PB0 | bidirectional | Bidirectional 5 V tolerant GPIO (FT_a) with wake-up, alternate functions USART_RX, LPUART_RTS_DE and TIM1_CH2N, and ADC input VINM1. |
| 5 | PA11 | bidirectional | Bidirectional 5 V tolerant GPIO with wake-up and GPIO-in-DEEPSTOP capability, alternate functions MCO, SPI1_NSS, RX_SEQUENCE and SPI3_MOSI. |
| 6 | PA10 | bidirectional | Bidirectional 5 V tolerant GPIO with BOOT, wake-up and GPIO-in-DEEPSTOP capability, alternate functions LCO, SPI1_MISO and TX_SEQUENCE. |
| 7 | PA9 | bidirectional | Bidirectional 5 V tolerant GPIO with wake-up and GPIO-in-DEEPSTOP capability, alternate functions USART_TX, SPI1_SCK and RTC_OUT. |
| 8 | PA8 | bidirectional | Bidirectional 5 V tolerant GPIO with wake-up and GPIO-in-DEEPSTOP capability, alternate functions USART_RX, SPI1_MOSI and RX_SEQUENCE. |
| 9 | PA0 | bidirectional | Bidirectional GPIO (FT_f, Fm+ capable) with wake-up, alternate functions I2C1_SCL, USART_CTS and SPI2_MCK. |
| 10 | PA1 | bidirectional | Bidirectional GPIO (FT_f, Fm+ capable) with wake-up, alternate functions I2C1_SDA, SPI2_MISO and USART_TX. |
| 11 | PA2 | bidirectional | Bidirectional 5 V tolerant GPIO with wake-up, serving as SWDIO by default, with alternate functions USART_CK, TIM_BKIN and SPI3_MCK. |
| 12 | PA3 | bidirectional | Bidirectional 5 V tolerant GPIO with wake-up, serving as SWCLK by default, with alternate functions USART_RTS_DE, TIM_BKIN2 and SPI3_SCK. |
| 13 | VDD2 | power_in | Battery voltage supply input, 1.7-3.6 V. |
| 14 | RF1 | bidirectional | RF input/output with 50 Ω impedance. |
| 15 | VDDRF | power_in | Battery voltage supply input for the RF block, 1.7-3.6 V. |
| 16 | OSCOUT | bidirectional | Connection to the 32 MHz crystal (RF I/O pin). |
| 17 | OSCIN | bidirectional | Connection to the 32 MHz crystal (RF I/O pin). |
| 18 | PB15 | bidirectional | Bidirectional 5 V tolerant GPIO with alternate functions I2C1_SMBA, TX_SEQUENCE, MCO and USART_TX. |
| 19 | PB14 | bidirectional | Bidirectional 3.6 V tolerant GPIO (FT_a) with alternate functions SPI1_MOSI, I2C2_SDA and USART_RX, and additional function VIN_PVD. |
| 20 | PB13 | bidirectional | Bidirectional 5 V tolerant GPIO with alternate functions SPI1_MISO, I2C2_SCL and PDM_CLK, and additional function SXTAL1. |
| 21 | PB12 | bidirectional | Bidirectional 5 V tolerant GPIO with alternate functions SPI1_SCK, LCO and PDM_DATA, and additional function SXTAL0. |
| 22 | VFBSD | power_out | SMPS output (feedback pin for the step-down converter). |
| 23 | VSSSD | power_in | SMPS ground. |
| 24 | VLXSD | bidirectional | SMPS input/output switching node. |
| 25 | VDDSD | power_in | Battery voltage supply input for the SMPS, 1.7-3.6 V. |
| 26 | RSTN | bidirectional | Bidirectional reset pin with weak pull-up resistor. |
| 27 | VCAP | power_out | 1.2 V digital core supply output. |
| 28 | PB7 | bidirectional | Bidirectional GPIO (FT_f, Fm+ capable) with wake-up, alternate functions I2C2_SDA, SPI2_SCK and LPUART_RX. |
| 29 | PB6 | bidirectional | Bidirectional GPIO (FT_f, Fm+ capable) with wake-up, alternate functions I2C2_SCL, SPI2_NSS and LPUART_TX. |
| 30 | PB5 | bidirectional | Bidirectional 3.6 V tolerant GPIO (TT) with wake-up, alternate functions LPUART_RX, SPI2_MOSI and PDM_CLK, and additional function PGA_VBIAS_MIC (not 5 V tolerant). |
| 31 | PB4 | bidirectional | Bidirectional 5 V tolerant GPIO with wake-up, alternate functions LPUART_TX, SPI2_MISO and PDM_DATA, and additional function PGA_VIN. |
| 32 | VDD1 | power_in | Battery voltage supply input, 1.7-3.6 V. |
| 33 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | QFN-32-EP(5x5) |
| Category | Radio Frequency Chip/Antenna |
| Pins | 33 |
CAD (KiCad official)
- Symbol:
BLUENRG-345AT - Footprint:
Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm - 3D model: QFN-32-EP(5x5) (KiCad packages3D, STEP)
- 3D model files:
bluenrg-345at-etched.step/bluenrg-345at-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);bluenrg-345at.step/bluenrg-345at.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (73 pp, sha256
c3c8def9f2699f65, retrieved 2026-11-02, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# BLUENRG-345AT
**STMicroelectronics** · RF Transceiver ICs · QFN-32-EP(5x5)
BLUENRG-345AT from STMicroelectronics, in a QFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PB3 | bidirectional | Bidirectional 5 V tolerant GPIO (FT_a) with wake-up, alternate functions USART_CTS, LPUART_TX and TIM1_CH4, and ADC input VINP0. |
| 2 | PB2 | bidirectional | Bidirectional 5 V tolerant GPIO (FT_a) with wake-up, alternate functions USART_RTS_DE, PDM_DATA and TIM1_CH3, and ADC input VINM0. |
| 3 | PB1 | bidirectional | Bidirectional 5 V tolerant GPIO (FT_a) with wake-up, alternate functions SPI1_NSS, PDM_CLK and TIM1_ETR, and ADC input VINP1. |
| 4 | PB0 | bidirectional | Bidirectional 5 V tolerant GPIO (FT_a) with wake-up, alternate functions USART_RX, LPUART_RTS_DE and TIM1_CH2N, and ADC input VINM1. |
| 5 | PA11 | bidirectional | Bidirectional 5 V tolerant GPIO with wake-up and GPIO-in-DEEPSTOP capability, alternate functions MCO, SPI1_NSS, RX_SEQUENCE and SPI3_MOSI. |
| 6 | PA10 | bidirectional | Bidirectional 5 V tolerant GPIO with BOOT, wake-up and GPIO-in-DEEPSTOP capability, alternate functions LCO, SPI1_MISO and TX_SEQUENCE. |
| 7 | PA9 | bidirectional | Bidirectional 5 V tolerant GPIO with wake-up and GPIO-in-DEEPSTOP capability, alternate functions USART_TX, SPI1_SCK and RTC_OUT. |
| 8 | PA8 | bidirectional | Bidirectional 5 V tolerant GPIO with wake-up and GPIO-in-DEEPSTOP capability, alternate functions USART_RX, SPI1_MOSI and RX_SEQUENCE. |
| 9 | PA0 | bidirectional | Bidirectional GPIO (FT_f, Fm+ capable) with wake-up, alternate functions I2C1_SCL, USART_CTS and SPI2_MCK. |
| 10 | PA1 | bidirectional | Bidirectional GPIO (FT_f, Fm+ capable) with wake-up, alternate functions I2C1_SDA, SPI2_MISO and USART_TX. |
| 11 | PA2 | bidirectional | Bidirectional 5 V tolerant GPIO with wake-up, serving as SWDIO by default, with alternate functions USART_CK, TIM_BKIN and SPI3_MCK. |
| 12 | PA3 | bidirectional | Bidirectional 5 V tolerant GPIO with wake-up, serving as SWCLK by default, with alternate functions USART_RTS_DE, TIM_BKIN2 and SPI3_SCK. |
| 13 | VDD2 | power_in | Battery voltage supply input, 1.7-3.6 V. |
| 14 | RF1 | bidirectional | RF input/output with 50 Ω impedance. |
| 15 | VDDRF | power_in | Battery voltage supply input for the RF block, 1.7-3.6 V. |
| 16 | OSCOUT | bidirectional | Connection to the 32 MHz crystal (RF I/O pin). |
| 17 | OSCIN | bidirectional | Connection to the 32 MHz crystal (RF I/O pin). |
| 18 | PB15 | bidirectional | Bidirectional 5 V tolerant GPIO with alternate functions I2C1_SMBA, TX_SEQUENCE, MCO and USART_TX. |
| 19 | PB14 | bidirectional | Bidirectional 3.6 V tolerant GPIO (FT_a) with alternate functions SPI1_MOSI, I2C2_SDA and USART_RX, and additional function VIN_PVD. |
| 20 | PB13 | bidirectional | Bidirectional 5 V tolerant GPIO with alternate functions SPI1_MISO, I2C2_SCL and PDM_CLK, and additional function SXTAL1. |
| 21 | PB12 | bidirectional | Bidirectional 5 V tolerant GPIO with alternate functions SPI1_SCK, LCO and PDM_DATA, and additional function SXTAL0. |
| 22 | VFBSD | power_out | SMPS output (feedback pin for the step-down converter). |
| 23 | VSSSD | power_in | SMPS ground. |
| 24 | VLXSD | bidirectional | SMPS input/output switching node. |
| 25 | VDDSD | power_in | Battery voltage supply input for the SMPS, 1.7-3.6 V. |
| 26 | RSTN | bidirectional | Bidirectional reset pin with weak pull-up resistor. |
| 27 | VCAP | power_out | 1.2 V digital core supply output. |
| 28 | PB7 | bidirectional | Bidirectional GPIO (FT_f, Fm+ capable) with wake-up, alternate functions I2C2_SDA, SPI2_SCK and LPUART_RX. |
| 29 | PB6 | bidirectional | Bidirectional GPIO (FT_f, Fm+ capable) with wake-up, alternate functions I2C2_SCL, SPI2_NSS and LPUART_TX. |
| 30 | PB5 | bidirectional | Bidirectional 3.6 V tolerant GPIO (TT) with wake-up, alternate functions LPUART_RX, SPI2_MOSI and PDM_CLK, and additional function PGA_VBIAS_MIC (not 5 V tolerant). |
| 31 | PB4 | bidirectional | Bidirectional 5 V tolerant GPIO with wake-up, alternate functions LPUART_TX, SPI2_MISO and PDM_DATA, and additional function PGA_VIN. |
| 32 | VDD1 | power_in | Battery voltage supply input, 1.7-3.6 V. |
| 33 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | QFN-32-EP(5x5) |
| Category | Radio Frequency Chip/Antenna |
| Pins | 33 |
## CAD (KiCad official)
- Symbol: `BLUENRG-345AT`
- Footprint: `Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm`
- 3D model: QFN-32-EP(5x5) (KiCad packages3D, STEP)
- 3D model files: `bluenrg-345at-etched.step` / `bluenrg-345at-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `bluenrg-345at.step` / `bluenrg-345at.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [STMicroelectronics datasheet](https://www.st.com/resource/en/datasheet/bluenrg-345at.pdf) (73 pp, sha256 `c3c8def9f2699f65`, retrieved 2026-11-02, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/bluenrg-345at-datasheet.pdf)