component
BLUENRG-345AC
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), TQFN-32-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+69@@ -0,0 +1,69 @@+# BLUENRG-345AC++**STMicroelectronics** · Microcontrollers (MCU/MPU/SOC) · TQFN-32-EP(5x5)++BLUENRG-345AC from STMicroelectronics, in a TQFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | PB3 | bidirectional | 5 V tolerant I/O (FT_a) with wakeup and ADC_VINP0 analog input; alternate functions USART_CTS, LPUART_TX, TIM1_CH4. |+| 2 | PB2 | bidirectional | 5 V tolerant I/O (FT_a) with wakeup and ADC_VINM0 analog input; alternate functions USART_RTS_DE, PDM_DATA, TIM1_CH3. |+| 3 | PB1 | bidirectional | 5 V tolerant I/O (FT_a) with wakeup and ADC_VINP1 analog input; alternate functions SPI1_NSS, PDM_CLK, TIM1_ETR. |+| 4 | PB0 | bidirectional | 5 V tolerant I/O (FT_a) with wakeup and ADC_VINM1 analog input; alternate functions USART_RX, LPUART_RTS_DE, TIM1_CH2N. |+| 5 | PA11 | bidirectional | 5 V tolerant I/O (FT) with wakeup, GPIO in DEEPSTOP and RTC_OUT additional function; alternate functions MCO, SPI1_NSS, RX_SEQUENCE, SPI3_MOSI, TIM1_CH6, I2S3_SD. |+| 6 | PA10 | bidirectional | 5 V tolerant I/O (FT) with BOOT, wakeup and GPIO in DEEPSTOP functions, LCO additional function; alternate functions SPI1_MISO, TX_SEQUENCE, SPI3_MCK, TIM1_CH5, I2S3_MCK. |+| 7 | PA9 | bidirectional | 5 V tolerant I/O (FT) with wakeup and GPIO in DEEPSTOP, LCO additional function; alternate functions USART_TX, SPI1_SCK, RTC_OUT, SPI3_NSS, TIM1_CH4, I2S3_WS. |+| 8 | PA8 | bidirectional | 5 V tolerant I/O (FT) with wakeup and GPIO in DEEPSTOP, RTC_OUT additional function; alternate functions USART_RX, SPI1_MOSI, RX_SEQUENCE, SPI3_MISO, TIM1_CH3, I2S3_MISO. |+| 9 | PA0 | bidirectional | I/O (FT_f, Fm+ capable, 5 V tolerant) with wakeup; alternate functions I2C1_SCL, USART_CTS, SPI2_MCK, TIM1_CH3, I2S2_MCK. |+| 10 | PA1 | bidirectional | I/O (FT_f, Fm+ capable, 5 V tolerant) with wakeup; alternate functions I2C1_SDA, SPI2_MISO, USART_TX, TIM1_CH4, I2S2_MISO. |+| 11 | PA2 | bidirectional | 5 V tolerant I/O (FT) with wakeup; SWDIO debug function listed on this pin, alternate functions USART_CK, TIM_BKIN, SPI3_MCK, TIM1_CH5, I2S3_MCK. |+| 12 | PA3 | bidirectional | 5 V tolerant I/O (FT) with wakeup; SWCLK debug function listed on this pin, alternate functions USART_RTS_DE, TIM_BKIN2, SPI3_SCK, TIM1_CH6, I2S3_SCK. |+| 13 | VDD2 | power_in | Battery voltage input, 1.7 to 3.6 V. |+| 14 | RF1 | bidirectional | RF input/output with 50 Ω impedance. |+| 15 | VDDRF | power_in | Battery voltage input, 1.7 to 3.6 V. |+| 16 | OSCOUT | passive | 32 MHz crystal connection (RF I/O pin). |+| 17 | OSCIN | passive | 32 MHz crystal connection (RF I/O pin). |+| 18 | PB15 | bidirectional | 5 V tolerant I/O (FT); alternate functions I2C1_SMBA, TX_SEQUENCE, MCO, TIM1_CH4N, TIM1_CH6, USART_TX. |+| 19 | PB14 | bidirectional | 5 V tolerant I/O (FT_a) with VIN_PVD additional function; alternate functions SPI1_MOSI, I2C2_SDA, TIM1_ETR, TIM1_CH3N, TIM1_CH5, USART_RX. |+| 20 | PB13 | bidirectional | 5 V tolerant I/O (FT) with SXTAL1 additional function; alternate functions SPI1_MISO, I2C2_SCL, PDM_CLK, TIM1_BKIN2, TIM1_CH4. |+| 21 | PB12 | bidirectional | 5 V tolerant I/O (FT) with SXTAL0 additional function; alternate functions SPI1_SCK, LCO, PDM_DATA, TIM1_BKIN, TIM1_CH3. |+| 22 | VFBSD | power_out | SMPS output. |+| 23 | VSSSD | power_in | SMPS ground. |+| 24 | VLXSD | bidirectional | SMPS input/output. |+| 25 | VDDSD | power_in | Battery voltage input, 1.7 to 3.6 V. |+| 26 | RSTN | bidirectional | Reset pin (RST type) with weak pull-up resistor. |+| 27 | VCAP | power_out | 1.2 V digital core supply pin. |+| 28 | PB7 | bidirectional | 5 V tolerant I/O (FT_f, Fm+ capable) with wakeup; alternate functions I2C2_SDA, SPI2_SCK, LPUART_RX, TIM1_CH2, I2S2_SCK. |+| 29 | PB6 | bidirectional | 5 V tolerant I/O (FT_f, Fm+ capable) with wakeup; alternate functions I2C2_SCL, SPI2_NSS, LPUART_TX, TIM1_CH1, I2S2_WS. |+| 30 | PB5 | bidirectional | 3.6 V tolerant I/O (TT, not 5 V tolerant per note 1) with wakeup and PGA_VBIAS_MIC additional function; alternate functions LPUART_RX, SPI2_MOSI, PDM_CLK, I2S2_SD. |+| 31 | PB4 | bidirectional | 5 V tolerant I/O (FT) with wakeup and PGA_VIN additional function; alternate functions LPUART_TX, SPI2_MISO, PDM_DATA, I2S2_MISO. |+| 32 | VDD1 | power_in | Battery voltage input, 1.7 to 3.6 V. |+| 33 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | TQFN-32-EP(5x5) |+| Category | Embedded Processors & Controllers |+| Pins | 33 |++## CAD (KiCad official)++- Symbol: `BLUENRG-345AC`+- Footprint: `Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm`+- 3D model: TQFN-32-EP(5x5) (KiCad packages3D, STEP)+- 3D model files: `bluenrg-345ac-etched.step` / `bluenrg-345ac-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `bluenrg-345ac.step` / `bluenrg-345ac.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589042216795328512) (73 pp, sha256 `614fe4d1991b0774`, retrieved 2026-10-08, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/bluenrg-345ac-datasheet.pdf)
page.jsonadded+353@@ -0,0 +1,353 @@+{+ "slug": "bluenrg-345ac",+ "version": "0.1.0",+ "type": "component",+ "description": "STMicroelectronics Microcontrollers (MCU/MPU/SOC), TQFN-32-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "embedded processors & controllers",+ "bluenrg-345ac",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "bluenrg-345ac.kicad_sym",+ "bluenrg-345ac.kicad_mod",+ "bluenrg-345ac.glb",+ "bluenrg-345ac.step",+ "bluenrg-345ac.lbr",+ "docs/hero.png",+ "docs/bluenrg-345ac-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "bluenrg-345ac-hero.glb",+ "bluenrg-345ac-hero.overlay.json"+ ],+ "component": {+ "mpn": "BLUENRG-345AC",+ "manufacturer": "STMicroelectronics",+ "package": "TQFN-32-EP(5x5)",+ "pin_count": 33,+ "category": "Embedded Processors & Controllers",+ "subcategory": "Microcontrollers (MCU/MPU/SOC)",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589042216795328512",+ "parts": {+ "symbol": "bluenrg-345ac.kicad_sym",+ "footprint": "bluenrg-345ac.kicad_mod",+ "model_3d": "bluenrg-345ac-hero.glb",+ "model_3d_plain": "bluenrg-345ac.glb",+ "model_3d_step": "bluenrg-345ac-etched.step",+ "model_3d_step_plain": "bluenrg-345ac.step",+ "lbr": "bluenrg-345ac.lbr"+ },+ "distributor_links": {+ "lcsc": "C3446000",+ "digikey": "497-BLUENRG-345ACTR-ND",+ "mouser": "511-BLUENRG-345AC"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T19:45:26Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "497-BLUENRG-345ACTR-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "511-BLUENRG-345AC",+ "status": "found",+ "lifecycle": "Part Number Change"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "PB3",+ "type": "bidirectional",+ "description": "5 V tolerant I/O (FT_a) with wakeup and ADC_VINP0 analog input; alternate functions USART_CTS, LPUART_TX, TIM1_CH4."+ },+ {+ "number": "2",+ "name": "PB2",+ "type": "bidirectional",+ "description": "5 V tolerant I/O (FT_a) with wakeup and ADC_VINM0 analog input; alternate functions USART_RTS_DE, PDM_DATA, TIM1_CH3."+ },+ {+ "number": "3",+ "name": "PB1",+ "type": "bidirectional",+ "description": "5 V tolerant I/O (FT_a) with wakeup and ADC_VINP1 analog input; alternate functions SPI1_NSS, PDM_CLK, TIM1_ETR."+ },+ {+ "number": "4",+ "name": "PB0",+ "type": "bidirectional",+ "description": "5 V tolerant I/O (FT_a) with wakeup and ADC_VINM1 analog input; alternate functions USART_RX, LPUART_RTS_DE, TIM1_CH2N."+ },+ {+ "number": "5",+ "name": "PA11",+ "type": "bidirectional",+ "description": "5 V tolerant I/O (FT) with wakeup, GPIO in DEEPSTOP and RTC_OUT additional function; alternate functions MCO, SPI1_NSS, RX_SEQUENCE, SPI3_MOSI, TIM1_CH6, I2S3_SD."+ },+ {+ "number": "6",+ "name": "PA10",+ "type": "bidirectional",+ "description": "5 V tolerant I/O (FT) with BOOT, wakeup and GPIO in DEEPSTOP functions, LCO additional function; alternate functions SPI1_MISO, TX_SEQUENCE, SPI3_MCK, TIM1_CH5, I2S3_MCK."+ },+ {+ "number": "7",+ "name": "PA9",+ "type": "bidirectional",+ "description": "5 V tolerant I/O (FT) with wakeup and GPIO in DEEPSTOP, LCO additional function; alternate functions USART_TX, SPI1_SCK, RTC_OUT, SPI3_NSS, TIM1_CH4, I2S3_WS."+ },+ {+ "number": "8",+ "name": "PA8",+ "type": "bidirectional",+ "description": "5 V tolerant I/O (FT) with wakeup and GPIO in DEEPSTOP, RTC_OUT additional function; alternate functions USART_RX, SPI1_MOSI, RX_SEQUENCE, SPI3_MISO, TIM1_CH3, I2S3_MISO."+ },+ {+ "number": "9",+ "name": "PA0",+ "type": "bidirectional",+ "description": "I/O (FT_f, Fm+ capable, 5 V tolerant) with wakeup; alternate functions I2C1_SCL, USART_CTS, SPI2_MCK, TIM1_CH3, I2S2_MCK."+ },+ {+ "number": "10",+ "name": "PA1",+ "type": "bidirectional",+ "description": "I/O (FT_f, Fm+ capable, 5 V tolerant) with wakeup; alternate functions I2C1_SDA, SPI2_MISO, USART_TX, TIM1_CH4, I2S2_MISO."+ },+ {+ "number": "11",+ "name": "PA2",+ "type": "bidirectional",+ "description": "5 V tolerant I/O (FT) with wakeup; SWDIO debug function listed on this pin, alternate functions USART_CK, TIM_BKIN, SPI3_MCK, TIM1_CH5, I2S3_MCK."+ },+ {+ "number": "12",+ "name": "PA3",+ "type": "bidirectional",+ "description": "5 V tolerant I/O (FT) with wakeup; SWCLK debug function listed on this pin, alternate functions USART_RTS_DE, TIM_BKIN2, SPI3_SCK, TIM1_CH6, I2S3_SCK."+ },+ {+ "number": "13",+ "name": "VDD2",+ "type": "power_in",+ "description": "Battery voltage input, 1.7 to 3.6 V."+ },+ {+ "number": "14",+ "name": "RF1",+ "type": "bidirectional",+ "description": "RF input/output with 50 Ω impedance."+ },+ {+ "number": "15",+ "name": "VDDRF",+ "type": "power_in",+ "description": "Battery voltage input, 1.7 to 3.6 V."+ },+ {+ "number": "16",+ "name": "OSCOUT",+ "type": "passive",+ "description": "32 MHz crystal connection (RF I/O pin)."+ },+ {+ "number": "17",+ "name": "OSCIN",+ "type": "passive",+ "description": "32 MHz crystal connection (RF I/O pin)."+ },+ {+ "number": "18",+ "name": "PB15",+ "type": "bidirectional",+ "description": "5 V tolerant I/O (FT); alternate functions I2C1_SMBA, TX_SEQUENCE, MCO, TIM1_CH4N, TIM1_CH6, USART_TX."+ },+ {+ "number": "19",+ "name": "PB14",+ "type": "bidirectional",+ "description": "5 V tolerant I/O (FT_a) with VIN_PVD additional function; alternate functions SPI1_MOSI, I2C2_SDA, TIM1_ETR, TIM1_CH3N, TIM1_CH5, USART_RX."+ },+ {+ "number": "20",+ "name": "PB13",+ "type": "bidirectional",+ "description": "5 V tolerant I/O (FT) with SXTAL1 additional function; alternate functions SPI1_MISO, I2C2_SCL, PDM_CLK, TIM1_BKIN2, TIM1_CH4."+ },+ {+ "number": "21",+ "name": "PB12",+ "type": "bidirectional",+ "description": "5 V tolerant I/O (FT) with SXTAL0 additional function; alternate functions SPI1_SCK, LCO, PDM_DATA, TIM1_BKIN, TIM1_CH3."+ },+ {+ "number": "22",+ "name": "VFBSD",+ "type": "power_out",+ "description": "SMPS output."+ },+ {+ "number": "23",+ "name": "VSSSD",+ "type": "power_in",+ "description": "SMPS ground."+ },+ {+ "number": "24",+ "name": "VLXSD",+ "type": "bidirectional",+ "description": "SMPS input/output."+ },+ {+ "number": "25",+ "name": "VDDSD",+ "type": "power_in",+ "description": "Battery voltage input, 1.7 to 3.6 V."+ },+ {+ "number": "26",+ "name": "RSTN",+ "type": "bidirectional",+ "description": "Reset pin (RST type) with weak pull-up resistor."+ },+ {+ "number": "27",+ "name": "VCAP",+ "type": "power_out",+ "description": "1.2 V digital core supply pin."+ },+ {+ "number": "28",+ "name": "PB7",+ "type": "bidirectional",+ "description": "5 V tolerant I/O (FT_f, Fm+ capable) with wakeup; alternate functions I2C2_SDA, SPI2_SCK, LPUART_RX, TIM1_CH2, I2S2_SCK."+ },+ {+ "number": "29",+ "name": "PB6",+ "type": "bidirectional",+ "description": "5 V tolerant I/O (FT_f, Fm+ capable) with wakeup; alternate functions I2C2_SCL, SPI2_NSS, LPUART_TX, TIM1_CH1, I2S2_WS."+ },+ {+ "number": "30",+ "name": "PB5",+ "type": "bidirectional",+ "description": "3.6 V tolerant I/O (TT, not 5 V tolerant per note 1) with wakeup and PGA_VBIAS_MIC additional function; alternate functions LPUART_RX, SPI2_MOSI, PDM_CLK, I2S2_SD."+ },+ {+ "number": "31",+ "name": "PB4",+ "type": "bidirectional",+ "description": "5 V tolerant I/O (FT) with wakeup and PGA_VIN additional function; alternate functions LPUART_TX, SPI2_MISO, PDM_DATA, I2S2_MISO."+ },+ {+ "number": "32",+ "name": "VDD1",+ "type": "power_in",+ "description": "Battery voltage input, 1.7 to 3.6 V."+ },+ {+ "number": "33",+ "name": "EP",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: Package naming mismatch: the hint says TQFN-32-EP(5x5), but the datasheet names this package QFN32 (; The MPN BLUENRG-345AC is not mapped to a package in the datasheet. Ordering information (Table 49) l; The exposed pad is printed without a number, so it is listed as 'EP'. Confirm the pad numbering conv",+ "exposed pad 33 added from the footprint",+ "dropped thermal pad ['EP'] absent from footprint"+ ],+ "pages_sent": 27,+ "cost_usd": 0.1292,+ "at": "2026-10-08T19:44:52"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589042216795328512",+ "pages": 73,+ "sha256": "614fe4d1991b0774",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 33,+ "described": 33,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "bluenrg-345ac.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 5,+ 5,+ 0.875+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "5fa713ea46b36980895812ed853577889b7cb06d275041a39b99bc0be305dc79",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "bluenrg-345ac-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 5,+ 5,+ 0.875+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "ce1c5863dc56829c11a86ca83295952e861789dce7699fb94b523e8e68fcb8e9",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}