component
BLUENRG-232
Public Made by Adomby adom
STMicroelectronics RF Transceiver ICs, QFN-32-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownBLUENRG-232
STMicroelectronics · RF Transceiver ICs · QFN-32-EP(5x5)
BLUENRG-232 from STMicroelectronics, in a QFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DIO10 | bidirectional | General purpose digital I/O pin. |
| 2 | DIO9 | bidirectional | General purpose digital I/O pin. |
| 3 | DIO8 | bidirectional | General purpose digital I/O pin. |
| 4 | DIO7 | bidirectional | Bootloader pin monitored after power-up or hardware reset; must be held low to prevent bootloader activation; also functions as general purpose digital I/O. |
| 5 | DIO6 | bidirectional | General purpose digital I/O pin. |
| 6 | VBAT3 | power_in | Battery voltage input; supply connection for analog front-end. |
| 7 | DIO5 | bidirectional | General purpose digital I/O pin. |
| 8 | DIO4 | bidirectional | General purpose digital I/O pin. |
| 9 | DIO3 | bidirectional | General purpose digital I/O pin. |
| 10 | DIO2 | bidirectional | General purpose digital I/O pin. |
| 11 | DIO1 | bidirectional | General purpose digital I/O pin. |
| 12 | DIO0 | bidirectional | General purpose digital I/O pin. |
| 13 | DIO14 | bidirectional | General purpose digital I/O pin; can also function as ANATEST0 analog output for TX/RX event alerting. |
| 14 | ANATEST1 | output | TX/RX event alert analog output; transitions high approximately 18 μs before transmission and 10 μs before reception, returning low at end of event. |
| 15 | ADC1 | input | Analog-to-digital converter input channel 1 for analog signal measurement. |
| 16 | ADC2 | input | Analog-to-digital converter input channel 2 for analog signal measurement. |
| 17 | FXTAL1 | passive | High speed crystal oscillator (16 or 32 MHz) connection pin 1; requires external crystal and load capacitors. |
| 18 | FXTAL0 | passive | High speed crystal oscillator (16 or 32 MHz) connection pin 0; requires external crystal and load capacitors. |
| 19 | VBAT2 | power_in | Battery voltage input; supply connection for RF transceiver. |
| 20 | RF1 | bidirectional | Antenna positive connection for RF matching circuit; supports impedance matching for 2.4 GHz ISM band transmission and reception. |
| 21 | RF0 | bidirectional | Antenna negative or matched line connection for RF circuit; completes antenna impedance matching network. |
| 22 | SXTAL1 | passive | Low speed crystal oscillator (32 kHz) connection pin 1; requires external crystal for clock generation. |
| 23 | SXTAL0 | passive | Low speed crystal oscillator (32 kHz) connection pin 0; requires external crystal for clock generation. |
| 24 | VBAT1 | power_in | Battery voltage input; main supply connection for digital core and peripherals. |
| 25 | RESETN | input | Active low system reset input; asserts device reset when pulled low; requires external debounce capacitor. |
| 26 | SMPSFILT1 | input | SMPS (switched-mode power supply) output filter connection for external filter network to reduce switching noise. |
| 27 | SMPSFILT2 | bidirectional | SMPS output filter connection and/or auxiliary battery voltage input allowing external filter network integration or secondary supply path. |
| 28 | VDD1V2 | power_out | 1.2 V digital core regulated output; supplies internal core logic and can source current for external applications. |
| 29 | DIO13 | bidirectional | General purpose digital I/O pin configured as input-only (no output driver). |
| 30 | DIO12 | bidirectional | General purpose digital I/O pin configured as input-only (no output driver). |
| 31 | TEST | input | Test pin; must be connected to GND for normal device operation; used for factory testing. |
| 32 | DIO11 | bidirectional | General purpose digital I/O pin. |
| 33 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | QFN-32-EP(5x5) |
| Category | RF And Wireless |
| Pins | 33 |
CAD (KiCad official)
- Symbol:
BLUENRG-232 - Footprint:
Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm - 3D model: QFN-32-EP(5x5) (KiCad packages3D, STEP)
- 3D model files:
bluenrg-232-etched.step/bluenrg-232-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);bluenrg-232.step/bluenrg-232.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (175 pp, sha256
3e2a44e69880a284, retrieved 2026-09-26, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-4-6(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).