component
BLUENRG-132
Public Made by Adomby adom
STMicroelectronics RF Transceiver ICs, QFN-32-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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BLUENRG-132
STMicroelectronics · RF Transceiver ICs · QFN-32-EP(5x5)
BLUENRG-132 from STMicroelectronics, in a QFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IO10 | bidirectional | General purpose digital I/O; in serial1 mode it is the SWDIO SWD data signal, with internal pull-up. |
| 2 | IO9 | bidirectional | General purpose digital I/O; in serial1 mode it is the SWCLK SWD clock signal, with internal pull-up. |
| 3 | IO8 | bidirectional | General purpose digital I/O. |
| 4 | IO7/BOOT | bidirectional | Bootloader pin and general purpose digital I/O; it is monitored by the bootloader after power-up or hardware reset and should be low to prevent unwanted bootloader activation. |
| 5 | IO6 | bidirectional | General purpose digital I/O. |
| 6 | VBAT3 | power_in | Battery voltage input (VDD supply pin). |
| 7 | IO5 | bidirectional | General purpose digital I/O. |
| 8 | IO4 | bidirectional | General purpose digital I/O. |
| 9 | IO3 | bidirectional | General purpose digital I/O. |
| 10 | IO2 | bidirectional | General purpose digital I/O. |
| 11 | IO1 | bidirectional | General purpose digital I/O. |
| 12 | IO0 | bidirectional | General purpose digital I/O. |
| 13 | ANATEST0/IO14 | bidirectional | Analog output (ANATEST0, used for crystal startup measurement) or general purpose digital I/O; the pin is internally bound to ANATEST0 and a short positive pulse of about 75 µs is generated at device reset. |
| 14 | ANATEST1 | output | Analog output that switches high about 18 µs before a transmission and about 10 µs before a reception event, for antenna switching and coexistence control. |
| 15 | ADC1 | input | ADC input 1. |
| 16 | ADC2 | input | ADC input 2. |
| 17 | FXTAL1 | input | 16/32 MHz crystal connection. |
| 18 | FXTAL0 | input | 16/32 MHz crystal connection. |
| 19 | VBAT2 | power_in | Battery voltage input (VDD supply pin). |
| 20 | RF1 | bidirectional | Antenna and matching circuit connection. |
| 21 | RF0 | bidirectional | Antenna and matching circuit connection. |
| 22 | SXTAL1 | input | 32 kHz crystal connection. |
| 23 | SXTAL0 | input | 32 kHz crystal connection. |
| 24 | VBAT1 | power_in | Battery voltage input (VDD supply pin). |
| 25 | RESETN | input | System reset input. |
| 26 | SMPSFILT1 | input | SMPS output to external filter. |
| 27 | SMPSFILT2 | bidirectional | SMPS output to external filter, also used as battery voltage input. |
| 28 | VDD1V2 | power_out | 1.2 V digital core output. |
| 29 | IO13 | bidirectional | General purpose digital input; per the datasheet it can only be an input, and if unused it must be tied to GND through a pull-down resistor. |
| 30 | IO12 | bidirectional | General purpose digital input; per the datasheet it can only be an input, and if unused it must be tied to GND through a pull-down resistor. |
| 31 | TEST | input | Test pin, to be put to GND. |
| 32 | IO11 | bidirectional | General purpose digital I/O. |
| 33 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | QFN-32-EP(5x5) |
| Category | RF & Radio |
| Pins | 33 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating battery supply voltage | VBAT | 1.7 | 3.6 | V | 162 | ||
| Operating ambient temperature range | TA | -40 | 105 | °C | 162 | ||
| DC-DC converter supply voltage input and output | -0.3 | 3.9 | V | Pins: VBAT3, VBAT2, VBAT1, RESETN, SMPSFILT1, SMPSFILT2 | 161 | ||
| DC voltage on linear voltage regulator | -0.3 | 3.9 | V | Pin: VDD1V2 | 161 | ||
| DC voltage on digital input/output pins | -0.3 | 3.9 | V | Pins: DIO0 to DIO14, TEST | 161 | ||
| DC voltage on analog pins | -0.3 | 3.9 | V | Pins: ANATEST0, ANATEST1, ADC1, ADC2 | 161 | ||
| DC voltage on XTAL pins | -0.3 | 1.4 | V | Pins: FXTAL0, FXTAL1, SXTAL0, SXTAL1 | 161 | ||
| DC voltage on RF pins | -0.3 | 1.4 | V | Pins: RF0, RF1 | 161 | ||
| Storage temperature range | TSTG | -40 | 125 | °C | 161 | ||
| Electrostatic discharge voltage (HBM) | VESD-HBM | -2 | 2 | kV | 161 | ||
| Frequency range | FREQ | 2400 | 2483.5 | MHz | 165 | ||
| RF channel center frequency | RFch | 2402 | 2480 | MHz | 165 | ||
| Maximum output power | PMAX | 8 | 10 | dBm | At antenna connector | 165 | |
| 6 dB bandwidth for modulated carrier (1 Mbps) | PBW1M | 500 | kHz | Using resolution bandwidth of 100 kHz | 165 | ||
| High speed crystal oscillator frequency tolerance | fTOL | -50 | 50 | ppm | Includes initial accuracy, stability over temperature, aging and frequency pulling due to incorrect load capacitance | 167 | |
| High speed crystal oscillator equivalent series resistance | ESR | 100 | Ω | 167 | |||
| High speed crystal oscillator drive level | PD | 100 | µW | 167 | |||
| Low speed crystal oscillator frequency tolerance | fTOL | -50 | 50 | ppm | Includes initial accuracy, stability over temperature, aging and frequency pulling due to incorrect load capacitance. | 169 | |
| Low speed crystal oscillator equivalent series resistance | ESR | 90 | kΩ | 169 | |||
| Low speed crystal oscillator drive level | PD | 0.1 | µW | 169 | |||
| 32 kHz ring oscillator frequency tolerance | fTOL | -500 | 500 | ppm | 169 | ||
| PLL lock time | LOCKTIME | 40 | µs | 170 | |||
| PLL turn-on / hop time | TOTIME | 150 | µs | Including calibration | 170 | ||
| Analog supply voltage (ADC) | VDDA | 1.7 | 3 | 3.6 | V | 170 | |
| Analog supply current (ADC) | IDDA, AVG | 0.55 | mA | Average current during conversion | 170 | ||
| Input pin voltage (ADC) | VINP, iNN | -50 | mV | With input attenuator | 170 | ||
| Analog temperature sensor temperature range | TRANGE | -40 | 105 | °C | 171 | ||
| Error in temperature | TERR | -4 | 0 | 4 | °C | 171 | |
| Battery level indicator range | VBLTRANGE | 1.8 | 3.6 | V | 171 | ||
| Battery level indicator error | VBLTERR | -150 | 150 | mV | After calibration | 171 | |
| Ascending battery level threshold 1 | VABLT1 | 2.56 | 2.72 | 2.88 | V | 171 | |
| Descending battery level threshold 1 | VDBLT1 | 2.48 | 2.64 | 2.8 | V | 171 | |
| Ascending battery level threshold 2 | VABLT2 | 2.37 | 2.52 | 2.67 | V | 171 | |
| Descending battery level threshold 2 | VDBLT2 | 2.3 | 2.45 | 2.6 | V | 171 | |
| Ascending battery level threshold 3 | VABLT3 | 2.2 | 2.32 | 2.475 | V | 171 | |
| DC voltage low-level output (digital I/O) | VOL | 0.4 | V | IOL = 3 mA | 164 | ||
| Pull-down value (1.8 V supply) | RPD | 117 | 202 | 363 | kΩ | Digital input and output when 1.8 V supply | 113 |
| Pull-up value (1.8 V supply) | RPU | 135 | 211 | 334 | kΩ | Digital input and output when 1.8 V supply | 113 |
| Pull-down value (3.3 V supply) | RPD | 53 | 84 | 144 | kΩ | Digital input and output when 3.3V supply | 113 |
| Pull-up value (3.3 V supply) | RPU | 57 | 81 | 122 | kΩ | Digital input and output when 3.3V supply | 113 |
| Page erase time | 21.5 | ms | 108 | ||||
| Mass erase time | 21.5 | ms | 108 | ||||
| Program time WRITE | 44 | µs | 108 | ||||
| Program time BURSTWRITE | 44 | µs | 1 word | 108 | |||
| Program time BURSTWRITE | 65 | µs | 2 words | 108 | |||
| Program time BURSTWRITE | 86 | µs | 3 words | 108 | |||
| Program time BURSTWRITE | 107 | µs | 4 words | 108 | |||
| Thermal resistance junction-ambient | Rthj-amb | 34 | °C/W | QFN32 package | 161 | ||
| Thermal resistance junction-case | Rthj-c | 2.5 | °C/W | QFN32 package | 161 |
CAD (KiCad official)
- Symbol:
BLUENRG-132 - Footprint:
Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm - 3D model: QFN-32-EP(5x5) (KiCad packages3D, STEP)
- 3D model files:
bluenrg-132-etched.step/bluenrg-132-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);bluenrg-132.step/bluenrg-132.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (184 pp, sha256
c04914b6ac402ea9, retrieved 2026-10-28, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# BLUENRG-132
**STMicroelectronics** · RF Transceiver ICs · QFN-32-EP(5x5)
BLUENRG-132 from STMicroelectronics, in a QFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IO10 | bidirectional | General purpose digital I/O; in serial1 mode it is the SWDIO SWD data signal, with internal pull-up. |
| 2 | IO9 | bidirectional | General purpose digital I/O; in serial1 mode it is the SWCLK SWD clock signal, with internal pull-up. |
| 3 | IO8 | bidirectional | General purpose digital I/O. |
| 4 | IO7/BOOT | bidirectional | Bootloader pin and general purpose digital I/O; it is monitored by the bootloader after power-up or hardware reset and should be low to prevent unwanted bootloader activation. |
| 5 | IO6 | bidirectional | General purpose digital I/O. |
| 6 | VBAT3 | power_in | Battery voltage input (VDD supply pin). |
| 7 | IO5 | bidirectional | General purpose digital I/O. |
| 8 | IO4 | bidirectional | General purpose digital I/O. |
| 9 | IO3 | bidirectional | General purpose digital I/O. |
| 10 | IO2 | bidirectional | General purpose digital I/O. |
| 11 | IO1 | bidirectional | General purpose digital I/O. |
| 12 | IO0 | bidirectional | General purpose digital I/O. |
| 13 | ANATEST0/IO14 | bidirectional | Analog output (ANATEST0, used for crystal startup measurement) or general purpose digital I/O; the pin is internally bound to ANATEST0 and a short positive pulse of about 75 µs is generated at device reset. |
| 14 | ANATEST1 | output | Analog output that switches high about 18 µs before a transmission and about 10 µs before a reception event, for antenna switching and coexistence control. |
| 15 | ADC1 | input | ADC input 1. |
| 16 | ADC2 | input | ADC input 2. |
| 17 | FXTAL1 | input | 16/32 MHz crystal connection. |
| 18 | FXTAL0 | input | 16/32 MHz crystal connection. |
| 19 | VBAT2 | power_in | Battery voltage input (VDD supply pin). |
| 20 | RF1 | bidirectional | Antenna and matching circuit connection. |
| 21 | RF0 | bidirectional | Antenna and matching circuit connection. |
| 22 | SXTAL1 | input | 32 kHz crystal connection. |
| 23 | SXTAL0 | input | 32 kHz crystal connection. |
| 24 | VBAT1 | power_in | Battery voltage input (VDD supply pin). |
| 25 | RESETN | input | System reset input. |
| 26 | SMPSFILT1 | input | SMPS output to external filter. |
| 27 | SMPSFILT2 | bidirectional | SMPS output to external filter, also used as battery voltage input. |
| 28 | VDD1V2 | power_out | 1.2 V digital core output. |
| 29 | IO13 | bidirectional | General purpose digital input; per the datasheet it can only be an input, and if unused it must be tied to GND through a pull-down resistor. |
| 30 | IO12 | bidirectional | General purpose digital input; per the datasheet it can only be an input, and if unused it must be tied to GND through a pull-down resistor. |
| 31 | TEST | input | Test pin, to be put to GND. |
| 32 | IO11 | bidirectional | General purpose digital I/O. |
| 33 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | QFN-32-EP(5x5) |
| Category | RF & Radio |
| Pins | 33 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating battery supply voltage | VBAT | 1.7 | | 3.6 | V | | 162 |
| Operating ambient temperature range | TA | -40 | | 105 | °C | | 162 |
| DC-DC converter supply voltage input and output | | -0.3 | | 3.9 | V | Pins: VBAT3, VBAT2, VBAT1, RESETN, SMPSFILT1, SMPSFILT2 | 161 |
| DC voltage on linear voltage regulator | | -0.3 | | 3.9 | V | Pin: VDD1V2 | 161 |
| DC voltage on digital input/output pins | | -0.3 | | 3.9 | V | Pins: DIO0 to DIO14, TEST | 161 |
| DC voltage on analog pins | | -0.3 | | 3.9 | V | Pins: ANATEST0, ANATEST1, ADC1, ADC2 | 161 |
| DC voltage on XTAL pins | | -0.3 | | 1.4 | V | Pins: FXTAL0, FXTAL1, SXTAL0, SXTAL1 | 161 |
| DC voltage on RF pins | | -0.3 | | 1.4 | V | Pins: RF0, RF1 | 161 |
| Storage temperature range | TSTG | -40 | | 125 | °C | | 161 |
| Electrostatic discharge voltage (HBM) | VESD-HBM | -2 | | 2 | kV | | 161 |
| Frequency range | FREQ | 2400 | | 2483.5 | MHz | | 165 |
| RF channel center frequency | RFch | 2402 | | 2480 | MHz | | 165 |
| Maximum output power | PMAX | | 8 | 10 | dBm | At antenna connector | 165 |
| 6 dB bandwidth for modulated carrier (1 Mbps) | PBW1M | 500 | | | kHz | Using resolution bandwidth of 100 kHz | 165 |
| High speed crystal oscillator frequency tolerance | fTOL | -50 | | 50 | ppm | Includes initial accuracy, stability over temperature, aging and frequency pulling due to incorrect load capacitance | 167 |
| High speed crystal oscillator equivalent series resistance | ESR | | | 100 | Ω | | 167 |
| High speed crystal oscillator drive level | PD | | | 100 | µW | | 167 |
| Low speed crystal oscillator frequency tolerance | fTOL | -50 | | 50 | ppm | Includes initial accuracy, stability over temperature, aging and frequency pulling due to incorrect load capacitance. | 169 |
| Low speed crystal oscillator equivalent series resistance | ESR | | | 90 | kΩ | | 169 |
| Low speed crystal oscillator drive level | PD | | | 0.1 | µW | | 169 |
| 32 kHz ring oscillator frequency tolerance | fTOL | -500 | | 500 | ppm | | 169 |
| PLL lock time | LOCKTIME | | | 40 | µs | | 170 |
| PLL turn-on / hop time | TOTIME | | | 150 | µs | Including calibration | 170 |
| Analog supply voltage (ADC) | VDDA | 1.7 | 3 | 3.6 | V | | 170 |
| Analog supply current (ADC) | IDDA, AVG | | | 0.55 | mA | Average current during conversion | 170 |
| Input pin voltage (ADC) | VINP, iNN | -50 | | | mV | With input attenuator | 170 |
| Analog temperature sensor temperature range | TRANGE | -40 | | 105 | °C | | 171 |
| Error in temperature | TERR | -4 | 0 | 4 | °C | | 171 |
| Battery level indicator range | VBLTRANGE | 1.8 | | 3.6 | V | | 171 |
| Battery level indicator error | VBLTERR | -150 | | 150 | mV | After calibration | 171 |
| Ascending battery level threshold 1 | VABLT1 | 2.56 | 2.72 | 2.88 | V | | 171 |
| Descending battery level threshold 1 | VDBLT1 | 2.48 | 2.64 | 2.8 | V | | 171 |
| Ascending battery level threshold 2 | VABLT2 | 2.37 | 2.52 | 2.67 | V | | 171 |
| Descending battery level threshold 2 | VDBLT2 | 2.3 | 2.45 | 2.6 | V | | 171 |
| Ascending battery level threshold 3 | VABLT3 | 2.2 | 2.32 | 2.475 | V | | 171 |
| DC voltage low-level output (digital I/O) | VOL | | | 0.4 | V | IOL = 3 mA | 164 |
| Pull-down value (1.8 V supply) | RPD | 117 | 202 | 363 | kΩ | Digital input and output when 1.8 V supply | 113 |
| Pull-up value (1.8 V supply) | RPU | 135 | 211 | 334 | kΩ | Digital input and output when 1.8 V supply | 113 |
| Pull-down value (3.3 V supply) | RPD | 53 | 84 | 144 | kΩ | Digital input and output when 3.3V supply | 113 |
| Pull-up value (3.3 V supply) | RPU | 57 | 81 | 122 | kΩ | Digital input and output when 3.3V supply | 113 |
| Page erase time | | 21.5 | | | ms | | 108 |
| Mass erase time | | 21.5 | | | ms | | 108 |
| Program time WRITE | | 44 | | | µs | | 108 |
| Program time BURSTWRITE | | 44 | | | µs | 1 word | 108 |
| Program time BURSTWRITE | | 65 | | | µs | 2 words | 108 |
| Program time BURSTWRITE | | 86 | | | µs | 3 words | 108 |
| Program time BURSTWRITE | | 107 | | | µs | 4 words | 108 |
| Thermal resistance junction-ambient | Rthj-amb | | 34 | | °C/W | QFN32 package | 161 |
| Thermal resistance junction-case | Rthj-c | | 2.5 | | °C/W | QFN32 package | 161 |
## CAD (KiCad official)
- Symbol: `BLUENRG-132`
- Footprint: `Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm`
- 3D model: QFN-32-EP(5x5) (KiCad packages3D, STEP)
- 3D model files: `bluenrg-132-etched.step` / `bluenrg-132-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `bluenrg-132.step` / `bluenrg-132.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [STMicroelectronics datasheet](https://www.st.com/resource/en/datasheet/bluenrg-132.pdf) (184 pp, sha256 `c04914b6ac402ea9`, retrieved 2026-10-28, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/bluenrg-132-datasheet.pdf)