component
BL9161G-33BAURN
Public Made by Adomby adom
BL(Shanghai Belling) Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SC-70-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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BL9161G-33BAURN
BL(Shanghai Belling) · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SC-70-5
BL9161G-33BAURN from BL(Shanghai Belling), in a SC-70-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Power input voltage, with the datasheet's electrical characteristics giving an input range of 2.2 V to 6 V. |
| 2 | GND | power_in | Ground pin, which should be connected to a clean analog ground with separate VIN and VOUT ground planes joined only at this pin. |
| 3 | EN | input | Chip enable pin with an internal pull-down resistor; the LDO turns on when EN is above 1.2 V and shuts down when it falls below 0.4 V. |
| 4 | NC | unconnected | No connection. |
| 5 | VOUT | power_out | Regulated output voltage, which needs a ceramic output capacitor of at least 1 µF with ESR greater than 25 mΩ for stability. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | BL(Shanghai Belling) |
| Package | SC-70-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage | VIN | 2.2 | 6 | V | 4 | ||
| Output Voltage Accuracy | VOUT | -2 | 2 | % | VIN=Vout+1V, IOUT=1mA | 4 | |
| Current Limit | ILIM | 360 | 450 | mA | RLOAD=1 | 4 | |
| Quiescent Current | IQ | 70 | 110 | µA | VEN>1.2V, IOUT=0mA | 4 | |
| Dropout Voltage | VDROP | 135 | 200 | mV | IOUT=200mA, VOUT=3.3V | 4 | |
| Dropout Voltage | VDROP | 205 | 300 | mV | IOUT=300mA, VOUT=3.3V | 4 | |
| Line Regulation | ΔVLINE | 0.02 | 0.17 | %/V | VIN=Vout+1V to 5.5V, IOUT=1mA | 4 | |
| Output Voltage Temperature Coefficient | TCVOUT | -60 | 60 | ppm/℃ | IOUT=1mA | 4 | |
| Standby Current | ISTBY | 0.01 | 1 | µA | VEN=GND, Shutdown | 4 | |
| EN Input Threshold Logic Low | VIL | 0.4 | V | VIN=3V to 5.5V, Shutdown | 4 | ||
| EN Input Threshold Logic High | VIH | 1.2 | V | VIN=3V to 5.5V, Start up | 4 | ||
| Input Voltage (absolute maximum) | VIN | -0.3 | 6 | V | 2 | ||
| EN Pin Input Voltage | -0.3 | V | Upper limit is VIN (as printed: -0.3V to VIN) | 2 | |||
| Output Voltages | -0.3 | V | Upper limit is VIN+0.3V (as printed: -0.3V to VIN+0.3V) | 2 | |||
| Output Current | 300 | mA | 2 | ||||
| Maximum Junction Temperature | TJ | 150 | °C | 2 | |||
| Operating Temperature Range | TA | -40 | 85 | °C | 2 | ||
| Maximum Operating Junction Temperature | TJ(MAX) | 125 | °C | Recommended operating conditions per application text | 7 | ||
| Storage Temperature Range | TSTG | -65 | 125 | °C | 2 | ||
| Lead Temperature (Soldering) | 300 | °C | Soldering, 10s | 2 | |||
| Load Regulation | ΔVLOAD | 20 | mV | 1mA<IOUT<300mA | 4 | ||
| EN Input Bias Current | IIBSD | 2 | µA | VEN=GND or VIN | 4 | ||
| Output Noise Voltage | eNO | 180 | VRMS | 10Hz to 100KHz, IOUT=100mA | 4 | ||
| Power Supply Rejection Ratio at 217Hz | PSRR | -75 | dB | f=217Hz, IOUT=10mA | 4 | ||
| Power Supply Rejection Ratio at 1kHz | PSRR | -71 | dB | f=1KHz, IOUT=10mA | 4 | ||
| Power Supply Rejection Ratio at 10kHz | PSRR | -55 | dB | f=10KHz, IOUT=10mA | 4 | ||
| Thermal Shutdown Temperature | TSD | 170 | °C | Shutdown, Temp increasing | 4 | ||
| Thermal Shutdown Hysteresis | TSDHY | 30 | °C | 4 | |||
| Junction-to-Ambient Thermal Resistance (SC70-5) | ΘJA | 333 | ℃/W | Approximately 1 square inch of 1 oz copper (Note 3) | 2 | ||
| Junction-to-Case Thermal Resistance (SC70-5) | ΘJC | 170 | ℃/W | 2 |
CAD (KiCad official)
- Symbol:
BL9161G-33BAURN - Footprint:
Package_TO_SOT_SMD:SOT-353_SC-70-5 - 3D model: SC-70-5 (KiCad packages3D, STEP)
- 3D model files:
bl9161g-33baurn-etched.step/bl9161g-33baurn-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);bl9161g-33baurn.step/bl9161g-33baurn.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: BL(Shanghai Belling) datasheet (12 pp, sha256
1f5c35b45955d0cb, retrieved 2026-11-04, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# BL9161G-33BAURN
**BL(Shanghai Belling)** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SC-70-5
BL9161G-33BAURN from BL(Shanghai Belling), in a SC-70-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Power input voltage, with the datasheet's electrical characteristics giving an input range of 2.2 V to 6 V. |
| 2 | GND | power_in | Ground pin, which should be connected to a clean analog ground with separate VIN and VOUT ground planes joined only at this pin. |
| 3 | EN | input | Chip enable pin with an internal pull-down resistor; the LDO turns on when EN is above 1.2 V and shuts down when it falls below 0.4 V. |
| 4 | NC | unconnected | No connection. |
| 5 | VOUT | power_out | Regulated output voltage, which needs a ceramic output capacitor of at least 1 µF with ESR greater than 25 mΩ for stability. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | BL(Shanghai Belling) |
| Package | SC-70-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage | VIN | 2.2 | | 6 | V | | 4 |
| Output Voltage Accuracy | VOUT | -2 | | 2 | % | VIN=Vout+1V, IOUT=1mA | 4 |
| Current Limit | ILIM | 360 | | 450 | mA | RLOAD=1 | 4 |
| Quiescent Current | IQ | | 70 | 110 | µA | VEN>1.2V, IOUT=0mA | 4 |
| Dropout Voltage | VDROP | | 135 | 200 | mV | IOUT=200mA, VOUT=3.3V | 4 |
| Dropout Voltage | VDROP | | 205 | 300 | mV | IOUT=300mA, VOUT=3.3V | 4 |
| Line Regulation | ΔVLINE | | 0.02 | 0.17 | %/V | VIN=Vout+1V to 5.5V, IOUT=1mA | 4 |
| Output Voltage Temperature Coefficient | TCVOUT | -60 | | 60 | ppm/℃ | IOUT=1mA | 4 |
| Standby Current | ISTBY | | 0.01 | 1 | µA | VEN=GND, Shutdown | 4 |
| EN Input Threshold Logic Low | VIL | | | 0.4 | V | VIN=3V to 5.5V, Shutdown | 4 |
| EN Input Threshold Logic High | VIH | 1.2 | | | V | VIN=3V to 5.5V, Start up | 4 |
| Input Voltage (absolute maximum) | VIN | -0.3 | | 6 | V | | 2 |
| EN Pin Input Voltage | | -0.3 | | | V | Upper limit is VIN (as printed: -0.3V to VIN) | 2 |
| Output Voltages | | -0.3 | | | V | Upper limit is VIN+0.3V (as printed: -0.3V to VIN+0.3V) | 2 |
| Output Current | | | | 300 | mA | | 2 |
| Maximum Junction Temperature | TJ | | | 150 | °C | | 2 |
| Operating Temperature Range | TA | -40 | | 85 | °C | | 2 |
| Maximum Operating Junction Temperature | TJ(MAX) | | | 125 | °C | Recommended operating conditions per application text | 7 |
| Storage Temperature Range | TSTG | -65 | | 125 | °C | | 2 |
| Lead Temperature (Soldering) | | | | 300 | °C | Soldering, 10s | 2 |
| Load Regulation | ΔVLOAD | | 20 | | mV | 1mA<IOUT<300mA | 4 |
| EN Input Bias Current | IIBSD | | 2 | | µA | VEN=GND or VIN | 4 |
| Output Noise Voltage | eNO | | 180 | | VRMS | 10Hz to 100KHz, IOUT=100mA | 4 |
| Power Supply Rejection Ratio at 217Hz | PSRR | | -75 | | dB | f=217Hz, IOUT=10mA | 4 |
| Power Supply Rejection Ratio at 1kHz | PSRR | | -71 | | dB | f=1KHz, IOUT=10mA | 4 |
| Power Supply Rejection Ratio at 10kHz | PSRR | | -55 | | dB | f=10KHz, IOUT=10mA | 4 |
| Thermal Shutdown Temperature | TSD | | 170 | | °C | Shutdown, Temp increasing | 4 |
| Thermal Shutdown Hysteresis | TSDHY | | 30 | | °C | | 4 |
| Junction-to-Ambient Thermal Resistance (SC70-5) | ΘJA | | 333 | | ℃/W | Approximately 1 square inch of 1 oz copper (Note 3) | 2 |
| Junction-to-Case Thermal Resistance (SC70-5) | ΘJC | | 170 | | ℃/W | | 2 |
## CAD (KiCad official)
- Symbol: `BL9161G-33BAURN`
- Footprint: `Package_TO_SOT_SMD:SOT-353_SC-70-5`
- 3D model: SC-70-5 (KiCad packages3D, STEP)
- 3D model files: `bl9161g-33baurn-etched.step` / `bl9161g-33baurn-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `bl9161g-33baurn.step` / `bl9161g-33baurn.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [BL(Shanghai Belling) datasheet](docs/bl9161g-33baurn-datasheet.pdf) (12 pp, sha256 `1f5c35b45955d0cb`, retrieved 2026-11-04, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/bl9161g-33baurn-datasheet.pdf)