component
BL8851
Public Made by Adomby adom
BL(Shanghai Belling) AC-DC Controllers & Regulators, SOT-23-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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BL8851
BL(Shanghai Belling) · AC-DC Controllers & Regulators · SOT-23-6
BL8851 from BL(Shanghai Belling), in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground reference for the controller. |
| 2 | FB | input | Feedback input whose voltage level, together with the current-sense signal at pin 4, sets the PWM duty cycle; open-loop voltage 3.9 to 4.2 V and absolute maximum -0.3 to 7 V. |
| 3 | RT | input | Dual-function pin connected through an NTC resistor to ground for over-temperature shutdown/latch control, or through a Zener to VDD for adjustable over-voltage protection; absolute maximum -0.3 to 7 V. |
| 4 | CS | input | Current sense input with 220 ns leading edge blanking and 0.75 V internal current limit threshold; absolute maximum -0.3 to 7 V. |
| 5 | VDD | power_in | Power supply input, recommended 10 to 30 V, absolute maximum 40 V DC, with UVLO on at 9 V typ and off at 15.3 V typ. |
| 6 | GATE | output | Totem-pole gate driver output for the external power MOSFET, clamped at 15 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | BL(Shanghai Belling) |
| Package | SOT-23-6 |
| Category | Power Management ICs |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VDD DC Supply Voltage | VDD | 40 | V | 3 | |||
| VDD DC Clamp Current | 10 | mA | 3 | ||||
| FB Input Voltage | -0.3 | 7 | V | 3 | |||
| Sense Input Voltage | -0.3 | 7 | V | 3 | |||
| RT Input Voltage | -0.3 | 7 | V | 3 | |||
| Operating Junction Temperature | TJ | -20 | 150 | °C | Min/Max | 3 | |
| Storage Temperature | Tstg | -55 | 160 | °C | 3 | ||
| VDD Supply Voltage | VDD | 10 | 30 | V | 3 | ||
| Operating Ambient Temperature | TA | -20 | 85 | °C | 3 | ||
| VDD Start up Current | Istartup | 5 | 20 | uA | VDD=11V, measure leakage current into VDD | 4 | |
| Operation Current | I_VDD_Operation | 2 | mA | VFB=3V | 4 | ||
| VDD Under Voltage Lockout Enter | UVLO(ON) | 8 | 9 | 10 | V | Enter | 4 |
| VDD Under Voltage Lockout Exit | UVLO(OFF) | 14.3 | 15.3 | 16.3 | V | Exit (Recovery) | 4 |
| Pull-up PMOS active | Vpull-up | 13 | V | 4 | |||
| VDD clamp voltage | Vdd_clamp | 30 | 32 | 34 | V | Ivdd=10mA | 4 |
| Over voltage protection voltage | OVP(ON) | 24 | 26 | 28 | V | CS=0V,FB=3V, Ramp up VDD until gate clock is off | 4 |
| Latch release voltage | Vlatch_release | 5 | V | 4 | |||
| VFB Open Loop Voltage | VFB_Open | 3.9 | 4.2 | V | 4 | ||
| PWM input gain | Avcs | 2 | V/V | ΔVFB/ΔVCS | 4 | ||
| Maximum duty cycle | 75 | 80 | 85 | % | VDD=14V,VFB=3V,VCS=0V | 4 | |
| Threshold enter green mode | Vref_green | 2 | V | 4 | |||
| Threshold exit burst mode | Vref_burst_H | 1.275 | V | 4 | |||
| Threshold enter burst mode | Vref_burst_L | 1.175 | V | 4 | |||
| FB pin short circuit current | IFB_Short | 0.4 | mA | Short FB pin to GND and measure current | 4 | ||
| Power Limiting FB Threshold Voltage | VTH_PL | 3.7 | V | 4 | |||
| Power limiting Debounce Time | TD_PL | 80 | 88 | 96 | mSec | 4 | |
| FB Input Impedance | ZFB_IN | 4 | Kohm | 4 | |||
| Soft start time | 4 | ms | 4 | ||||
| Leading edge blanking time | T_blanking | 220 | ns | 4 | |||
| Sense Input Impedance | ZSENSE_IN | 40 | Kohm | 4 | |||
| Over Current Detection and Control Delay | TD_OC | 120 | nSec | From Over Current Occurs till the Gatedrive output start to turn off | 4 | ||
| Internal Current Limiting Threshold Voltage | VTH_OC | 0.75 | V | FB=3.3V | 4 | ||
| CS voltage clamper | Vocp_clamper | 0.9 | V | 4 | |||
| Normal Oscillation Frequency | FOSC | 60 | 65 | 70 | KHZ | VDD=14V, FB=3V, CS=0V | 4 |
| Frequency jittering | △f_OSC | -4 | 4 | % | 4 | ||
| Shuffling frequency | F_shuffling | 32 | Hz | 4 | |||
| Frequency Temperature Stability | △f_Temp | 1 | % | 4 | |||
| Frequency Voltage Stability | f_VDD | 1 | % | 5 | |||
| Burst Mode Base Frequency | F_Burst | 22 | KHZ | 5 | |||
| Output low level | VOL | 1 | V | VDD=14V, Io=5mA | 5 | ||
| Output high level | VOH | 6 | V | VDD=14V, Io=20mA | 5 | ||
| Output clamp voltage | V_clamp | 15 | V | 5 | |||
| Output rising time | T_r | 175 | nS | 1V ~ 12V @ CL=1000pF | 5 | ||
| Output falling time | T_f | 85 | nS | 12V ~ 1V @ CL=500pF | 5 | ||
| Output current of RT pin | IRT | 95 | 100 | 105 | uA | 5 | |
| Threshold voltage for OTP | VOTP | 0.95 | 1 | 1.05 | V | 5 | |
| OTP debounce time | Td_OTP | 32 | Cycle | 5 | |||
| Float voltage at RT pin | VRT_FL | 2.3 | V | 5 | |||
| External OVP threshold voltage | Vth_OVP | 4 | V | 5 |
CAD (KiCad official)
- Symbol:
BL8851 - Footprint:
Package_TO_SOT_SMD:SOT-23-6 - 3D model: SOT-23-6 (KiCad packages3D, STEP)
- 3D model files:
bl8851-etched.step/bl8851-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);bl8851.step/bl8851.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: BL(Shanghai Belling) datasheet (7 pp, sha256
0553dcea6b39e677, retrieved 2026-10-22, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# BL8851
**BL(Shanghai Belling)** · AC-DC Controllers & Regulators · SOT-23-6
BL8851 from BL(Shanghai Belling), in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground reference for the controller. |
| 2 | FB | input | Feedback input whose voltage level, together with the current-sense signal at pin 4, sets the PWM duty cycle; open-loop voltage 3.9 to 4.2 V and absolute maximum -0.3 to 7 V. |
| 3 | RT | input | Dual-function pin connected through an NTC resistor to ground for over-temperature shutdown/latch control, or through a Zener to VDD for adjustable over-voltage protection; absolute maximum -0.3 to 7 V. |
| 4 | CS | input | Current sense input with 220 ns leading edge blanking and 0.75 V internal current limit threshold; absolute maximum -0.3 to 7 V. |
| 5 | VDD | power_in | Power supply input, recommended 10 to 30 V, absolute maximum 40 V DC, with UVLO on at 9 V typ and off at 15.3 V typ. |
| 6 | GATE | output | Totem-pole gate driver output for the external power MOSFET, clamped at 15 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | BL(Shanghai Belling) |
| Package | SOT-23-6 |
| Category | Power Management ICs |
| Pins | 6 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VDD DC Supply Voltage | VDD | | | 40 | V | | 3 |
| VDD DC Clamp Current | | | | 10 | mA | | 3 |
| FB Input Voltage | | -0.3 | | 7 | V | | 3 |
| Sense Input Voltage | | -0.3 | | 7 | V | | 3 |
| RT Input Voltage | | -0.3 | | 7 | V | | 3 |
| Operating Junction Temperature | TJ | -20 | | 150 | °C | Min/Max | 3 |
| Storage Temperature | Tstg | -55 | | 160 | °C | | 3 |
| VDD Supply Voltage | VDD | 10 | | 30 | V | | 3 |
| Operating Ambient Temperature | TA | -20 | | 85 | °C | | 3 |
| VDD Start up Current | Istartup | | 5 | 20 | uA | VDD=11V, measure leakage current into VDD | 4 |
| Operation Current | I_VDD_Operation | | 2 | | mA | VFB=3V | 4 |
| VDD Under Voltage Lockout Enter | UVLO(ON) | 8 | 9 | 10 | V | Enter | 4 |
| VDD Under Voltage Lockout Exit | UVLO(OFF) | 14.3 | 15.3 | 16.3 | V | Exit (Recovery) | 4 |
| Pull-up PMOS active | Vpull-up | | 13 | | V | | 4 |
| VDD clamp voltage | Vdd_clamp | 30 | 32 | 34 | V | Ivdd=10mA | 4 |
| Over voltage protection voltage | OVP(ON) | 24 | 26 | 28 | V | CS=0V,FB=3V, Ramp up VDD until gate clock is off | 4 |
| Latch release voltage | Vlatch_release | | 5 | | V | | 4 |
| VFB Open Loop Voltage | VFB_Open | | 3.9 | 4.2 | V | | 4 |
| PWM input gain | Avcs | | 2 | | V/V | ΔVFB/ΔVCS | 4 |
| Maximum duty cycle | | 75 | 80 | 85 | % | VDD=14V,VFB=3V,VCS=0V | 4 |
| Threshold enter green mode | Vref_green | | 2 | | V | | 4 |
| Threshold exit burst mode | Vref_burst_H | | 1.275 | | V | | 4 |
| Threshold enter burst mode | Vref_burst_L | | 1.175 | | V | | 4 |
| FB pin short circuit current | IFB_Short | | 0.4 | | mA | Short FB pin to GND and measure current | 4 |
| Power Limiting FB Threshold Voltage | VTH_PL | | 3.7 | | V | | 4 |
| Power limiting Debounce Time | TD_PL | 80 | 88 | 96 | mSec | | 4 |
| FB Input Impedance | ZFB_IN | | 4 | | Kohm | | 4 |
| Soft start time | | | 4 | | ms | | 4 |
| Leading edge blanking time | T_blanking | | 220 | | ns | | 4 |
| Sense Input Impedance | ZSENSE_IN | | 40 | | Kohm | | 4 |
| Over Current Detection and Control Delay | TD_OC | | 120 | | nSec | From Over Current Occurs till the Gatedrive output start to turn off | 4 |
| Internal Current Limiting Threshold Voltage | VTH_OC | | 0.75 | | V | FB=3.3V | 4 |
| CS voltage clamper | Vocp_clamper | | 0.9 | | V | | 4 |
| Normal Oscillation Frequency | FOSC | 60 | 65 | 70 | KHZ | VDD=14V, FB=3V, CS=0V | 4 |
| Frequency jittering | △f_OSC | -4 | | 4 | % | | 4 |
| Shuffling frequency | F_shuffling | | 32 | | Hz | | 4 |
| Frequency Temperature Stability | △f_Temp | | 1 | | % | | 4 |
| Frequency Voltage Stability | f_VDD | | 1 | | % | | 5 |
| Burst Mode Base Frequency | F_Burst | | 22 | | KHZ | | 5 |
| Output low level | VOL | | | 1 | V | VDD=14V, Io=5mA | 5 |
| Output high level | VOH | 6 | | | V | VDD=14V, Io=20mA | 5 |
| Output clamp voltage | V_clamp | | 15 | | V | | 5 |
| Output rising time | T_r | | 175 | | nS | 1V ~ 12V @ CL=1000pF | 5 |
| Output falling time | T_f | | 85 | | nS | 12V ~ 1V @ CL=500pF | 5 |
| Output current of RT pin | IRT | 95 | 100 | 105 | uA | | 5 |
| Threshold voltage for OTP | VOTP | 0.95 | 1 | 1.05 | V | | 5 |
| OTP debounce time | Td_OTP | | 32 | | Cycle | | 5 |
| Float voltage at RT pin | VRT_FL | | 2.3 | | V | | 5 |
| External OVP threshold voltage | Vth_OVP | | 4 | | V | | 5 |
## CAD (KiCad official)
- Symbol: `BL8851`
- Footprint: `Package_TO_SOT_SMD:SOT-23-6`
- 3D model: SOT-23-6 (KiCad packages3D, STEP)
- 3D model files: `bl8851-etched.step` / `bl8851-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `bl8851.step` / `bl8851.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [BL(Shanghai Belling) datasheet](docs/bl8851-datasheet.pdf) (7 pp, sha256 `0553dcea6b39e677`, retrieved 2026-10-22, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/bl8851-datasheet.pdf)