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docs bl8075cb5tr50: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 2mo ago
bl8075cb5tr50-etched.fit.json bl8075cb5tr50: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
bl8075cb5tr50-etched.glb bl8075cb5tr50: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC bo… · Ray 14d ago
bl8075cb5tr50-etched.step bl8075cb5tr50: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC bo… · Ray 14d ago
bl8075cb5tr50.glb Publish 0.1.0 · Ray 2mo ago
bl8075cb5tr50.kicad_mod Publish 0.1.0 · Ray 2mo ago
bl8075cb5tr50.kicad_sym Publish 0.1.0 · Ray 2mo ago
bl8075cb5tr50.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray 2mo ago
bl8075cb5tr50.step Publish 0.1.0 · Ray 2mo ago
package.json Publish 0.2.0 · Ray 2mo ago
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 2mo ago
page.json bl8075cb5tr50: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC bo… · Ray 14d ago
README.md bl8075cb5tr50: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 1mo ago

BL8075CB5TR50

BL Shanghai Belling · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5

BL8075CB5TR50 from BL Shanghai Belling, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VIN power_in Regulator input supply. Operating range 3 V to 16 V (absolute max 20 V). Bypass to GND with a 1 uF ceramic capacitor close to the pin.
2 GND power_in Device ground reference for the internal reference, error amplifier, and output driver.
3 EN input Active-high enable input. VEN >= 1.5 V (up to VIN) turns the regulator on; VEN <= 0.4 V shuts it down (Iq typ. 1 uA at Vin=12 V, VEN=0 V). Do not leave floating.
4 NC unconnected No internal connection. Leave floating or tie to GND per PCB convention.
5 VOUT power_out Regulated output. Factory-trimmed to 5.0 V (suffix 50) at ±2% accuracy, up to 500 mA. Requires a 1 uF ceramic output capacitor to GND for stability.

Key specifications

Parameter Value
Manufacturer BL Shanghai Belling
Package SOT-23-5
Category PMIC
Pins 5

Ordering variants

Same part, different packaging or reel option.

  • BL8075CB5TR50
  • BL8075CB5TR50CC3TR

CAD (KiCad official)

  • Symbol: BL8075CB5TR50
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: bl8075cb5tr50-etched.step / bl8075cb5tr50-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); bl8075cb5tr50.step / bl8075cb5tr50.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
bl8075cb5tr50.step 85 KB You want the bare part, or you mark your own boards.
bl8075cb5tr50-etched.step 2.7 MB You want the part with BL8075CB5TR50 already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 631 faces against 102 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: BL Shanghai Belling datasheet (6 pp, sha256 73ed30c1a6b4591d, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF