bl8072cotr50

@@ -0,0 +1,43 @@+# BL8072COTR50++**BL Shanghai Belling** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · TO-252++BL8072COTR50 from BL Shanghai Belling, in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | Vss/ADJ | power_in | Ground / adjust pin. In fixed-voltage application this pin is tied to GND (0V). In the adjustable configuration it becomes the ADJ feedback node connected to the R1/R2 divider from Vout; the internal reference (VRef) is regulated between Vout and this pin (Vout = VRef*(1+R2/R1) + IAdj*R2, with IAdj ~2uA). A 0.1uF bypass capacitor from ADJ to GND is recommended to improve ripple rejection. |+| 2 | VOUT | power_out | Regulated output voltage pin. Delivers up to 2A with ±2% accuracy (±1% option). For the -50 suffix Vout = 5.0V typical. Requires a 1uF ceramic output capacitor to GND for stability. |+| 3 | VDD | power_in | Input supply pin. Recommended operating input voltage up to 18V, absolute maximum 20V. Requires a 1uF ceramic bypass capacitor to GND. Dropout typical 850mV @ 1.5A for Vout ≥ 2.0V. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | BL Shanghai Belling |+| Package | TO-252 |+| Category | PMIC |+| Pins | 3 |++## Ordering variants++- `BL8072COTR50`+- `BL8072COTR50CLTR`++## CAD (KiCad official)++- Symbol: `BL8072COTR50`+- Footprint: `Package_TO_SOT_SMD:TO-252-2`+- 3D model: TO-252 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [BL Shanghai Belling datasheet](docs/bl8072cotr50-datasheet.pdf) (None pp, sha256 `48a7d46f1c8be9ee`, retrieved 2026-08-17, tier: lcsc)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/bl8072cotr50-datasheet.pdf)

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