component
bl8072cotr50
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BL Shanghai Belling Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, TO-252. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Contents
README
markdownBL8072COTR50
BL Shanghai Belling · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · TO-252
BL8072COTR50 from BL Shanghai Belling, in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Vss/ADJ | power_in | Ground / adjust pin. In fixed-voltage application this pin is tied to GND (0V). In the adjustable configuration it becomes the ADJ feedback node connected to the R1/R2 divider from Vout; the internal reference (VRef) is regulated between Vout and this pin (Vout = VRef*(1+R2/R1) + IAdj*R2, with IAdj ~2uA). A 0.1uF bypass capacitor from ADJ to GND is recommended to improve ripple rejection. |
| 2 | VOUT | power_out | Regulated output voltage pin. Delivers up to 2A with ±2% accuracy (±1% option). For the -50 suffix Vout = 5.0V typical. Requires a 1uF ceramic output capacitor to GND for stability. |
| 3 | VDD | power_in | Input supply pin. Recommended operating input voltage up to 18V, absolute maximum 20V. Requires a 1uF ceramic bypass capacitor to GND. Dropout typical 850mV @ 1.5A for Vout ≥ 2.0V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | BL Shanghai Belling |
| Package | TO-252 |
| Category | PMIC |
| Pins | 3 |
Ordering variants
BL8072COTR50BL8072COTR50CLTR
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output voltage accuracy (default, no voltage-accuracy suffix) | Vout | -2 | 2 | % | Voltage accuracy blank (default) = ±2%; suffix 1 would be ±1% | 2 | |
| Maximum output current | Iout(Max.) | 2 | A | Vin-Vout=1V, Vout ≥ 2.0V | 3 | ||
| Dropout voltage | 850 | 950 | mV | Iout=1.5A, Vout ≥ 2.0V | 3 | ||
| Line regulation | 0.1 | 0.3 | %/V | Iout=10mA, Set Vout+1V≤Vin≤18V | 3 | ||
| Load regulation | 10 | 30 | mV | 1mA≤Iout≤1.5A | 3 | ||
| Quiescent current | Iq | 3 | 5 | uA | Vin=Set Vout+1V | 3 | |
| Input voltage | Vin | 18 | V | 3 | |||
| Output voltage temperature coefficient | T | 200 | ppm/C | Iout=100mA | 3 | ||
| Thermal resistance, junction to case (TO-252) | 12 | C/W | Junction to case, TO-252 | 3 | |||
| Input voltage range (recommended) | Vin | 18 | V | 2 | |||
| Ambient temperature (recommended) | Ta | -40 | 85 | C | 2 | ||
| Maximum input voltage | 20 | V | 2 | ||||
| Operating junction temperature | Tj | 125 | C | 2 | |||
| Ambient temperature (absolute maximum) | Ta | -40 | 85 | C | 2 | ||
| Storage temperature | Ts | -40 | 150 | C | 2 | ||
| Lead temperature | 260 | C | 10 s | 2 |
CAD (KiCad official)
- Symbol:
BL8072COTR50 - Footprint:
Package_TO_SOT_SMD:TO-252-2 - 3D model: TO-252 (KiCad packages3D, STEP)
- 3D model files:
bl8072cotr50-etched.step/bl8072cotr50-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);bl8072cotr50.step/bl8072cotr50.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: BL Shanghai Belling datasheet (None pp, sha256
48a7d46f1c8be9ee, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).
Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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