component

BL8039CB5TR

Public Made by Adom

by adom

BL Shanghai Belling DC-DC Converters, SOT-23-5. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs bl8039cb5tr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 2mo ago
bl8039cb5tr-etched.fit.json bl8039cb5tr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
bl8039cb5tr-etched.glb bl8039cb5tr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
bl8039cb5tr-etched.step bl8039cb5tr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
bl8039cb5tr.glb Publish 0.1.0 · Ray 2mo ago
bl8039cb5tr.kicad_mod Publish 0.1.0 · Ray 2mo ago
bl8039cb5tr.kicad_sym Publish 0.1.0 · Ray 2mo ago
bl8039cb5tr.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray 2mo ago
bl8039cb5tr.step Publish 0.1.0 · Ray 2mo ago
package.json Publish 0.2.0 · Ray 2mo ago
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 2mo ago
page.json bl8039cb5tr: specified limits as data (metadata.characteristics, 13 rows from the datasheet) · Ray 26d ago
README.md bl8039cb5tr: specified limits as data (metadata.characteristics, 13 rows from the datasheet) · Ray 26d ago

BL8039CB5TR

BL Shanghai Belling · DC-DC Converters · SOT-23-5

BL8039CB5TR from BL Shanghai Belling, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 EN input Enable input. Drive high (VIH >= 1.2V) to enable the converter; drive low (VIL <= 0.5V) to place the part in shutdown (IQ < 1uA). Do not leave floating.
2 GND power_in Device ground and power return for the internal low-side synchronous NMOS. Tie to the ground plane with a short, wide, low-inductance path.
3 SW output Switch node. Connects to the drains of the internal high-side PMOS and low-side NMOS. Connect the external power inductor (typ. 1uH-2.2uH) between SW and the regulated output. Keep trace short and wide to minimize EMI.
4 VIN power_in Supply input, 2.6V to 5.5V (8V abs max, 6.1V OVP threshold). Bypass with a low-ESR ceramic capacitor (typ. 10uF) placed as close as possible to the pin.
5 FB input Feedback input to the error amplifier, regulated to VREF = 0.6V (+/-2%). Connect an external resistor divider from VOUT to FB and GND to set output between 0.6V and VIN: R_TOP = R_BOTTOM * (VOUT/0.6 - 1). Feedback leakage 0.1uA typ.

Key specifications

Parameter Value
Manufacturer BL Shanghai Belling
Package SOT-23-5
Category PMIC
Pins 5

Ordering variants

  • BL8039CB5TR

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input voltage range VIN 2.6 5.5 V 2
Feedback voltage VREF 0.588 0.6 0.612 V Vin=5V 2
Switching frequency FSOC 1.6 2 2.4 MHz 2
Under voltage lockout VUVLO 1.9 2.1 2.3 V 2
Peak current limit ILIMIT 2.7 3.3 A 2
Max input voltage 8 V 2
Max operating junction temperature (TJ) TJ 125 °C 2
Ambient temperature (TA) TA -40 85 °C 2
Maximum power dissipation, SOT23-5 400 mW SOT23-5 2
Storage temperature (TS) TS -40 150 °C 2
Lead temperature & time 260 °C 10S 2
ESD (HBM) 2000 V HBM 2
Package thermal resistance (JA) JA 200 °C/W 2

CAD (KiCad official)

  • Symbol: BL8039CB5TR
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: bl8039cb5tr-etched.step / bl8039cb5tr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); bl8039cb5tr.step / bl8039cb5tr.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
bl8039cb5tr.step 85 KB You want the bare part, or you mark your own boards.
bl8039cb5tr-etched.step 2.5 MB You want the part with BL8039CB5TR already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 587 faces against 102 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: BL Shanghai Belling datasheet (7 pp, sha256 ae8ae21196a5c32f, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF