BL7142WL

{
  "slug": "bl7142wl",
  "version": "0.1.0",
  "type": "component",
  "description": "BL Shanghai Belling Digital Isolators, SOIC-16-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "signal isolation devices",
    "bl7142wl",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "bl7142wl.kicad_sym",
    "bl7142wl.kicad_mod",
    "bl7142wl.glb",
    "bl7142wl.step",
    "bl7142wl.lbr",
    "docs/hero.png",
    "docs/bl7142wl-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "bl7142wl-hero.glb",
    "bl7142wl-hero.overlay.json",
    "bl7142wl-etched.glb"
  ],
  "component": {
    "mpn": "BL7142WL",
    "manufacturer": "BL Shanghai Belling",
    "package": "SOIC-16-300mil",
    "pin_count": 16,
    "category": "Signal Isolation Devices",
    "subcategory": "Digital Isolators",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590904913482227712",
    "parts": {
      "symbol": "bl7142wl.kicad_sym",
      "footprint": "bl7142wl.kicad_mod",
      "model_3d": "bl7142wl-hero.glb",
      "model_3d_plain": "bl7142wl-etched.glb",
      "model_3d_step": "bl7142wl-etched.step",
      "model_3d_step_plain": "bl7142wl.step",
      "lbr": "bl7142wl.lbr"
    },
    "distributor_links": {
      "lcsc": "C7436524"
    },
    "distributor_check": {
      "checked_at": "2026-10-21T01:35:42Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "no match"
      },
      "mouser": {
        "pn": null,
        "status": "no match"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "VDD1",
        "type": "power_in",
        "description": "Side-1 supply; recommended VDD1 range is 2.35 V to 5.5 V, and the datasheet calls for two external VDD bypass capacitors (100 nF, within 2 mm of the device)."
      },
      {
        "number": "2",
        "name": "GND1",
        "type": "power_in",
        "description": "Side-1 reference ground for the side-1 supply and logic."
      },
      {
        "number": "3",
        "name": "VIA",
        "type": "input",
        "description": "Channel A forward input on side 1; logic input thresholds are VIH ≥ 0.7×VDDI and VIL ≤ 0.25×VDDI."
      },
      {
        "number": "4",
        "name": "VIB",
        "type": "input",
        "description": "Channel B forward input on side 1; logic input thresholds are VIH ≥ 0.7×VDDI and VIL ≤ 0.25×VDDI."
      },
      {
        "number": "5",
        "name": "VOC",
        "type": "output",
        "description": "Channel C reverse output on side 1 (BL7142 assignment of the shared VIC/VOC pin); the output is high-impedance when the enable is low."
      },
      {
        "number": "6",
        "name": "VOD",
        "type": "output",
        "description": "Channel D reverse output on side 1 (BL7142 assignment of the shared VID/VOD pin); the output is high-impedance when the enable is low."
      },
      {
        "number": "7",
        "name": "EN1",
        "type": "input",
        "description": "Side-1 output enable, active high; if left open the enable defaults to enabled, and a low level puts the side-1 outputs in high impedance."
      },
      {
        "number": "8",
        "name": "GND1",
        "type": "power_in",
        "description": "Side-1 reference ground (second side-1 ground pin)."
      },
      {
        "number": "9",
        "name": "GND2",
        "type": "power_in",
        "description": "Side-2 reference ground for the side-2 supply and logic."
      },
      {
        "number": "10",
        "name": "EN2",
        "type": "input",
        "description": "Side-2 output enable, active high; if left open the enable defaults to enabled, and a low level puts the side-2 outputs in high impedance."
      },
      {
        "number": "11",
        "name": "VID",
        "type": "input",
        "description": "Channel D forward input on side 2 (BL7142 assignment of the shared VOD/VID pin); logic input thresholds are VIH ≥ 0.7×VDDI and VIL ≤ 0.25×VDDI."
      },
      {
        "number": "12",
        "name": "VIC",
        "type": "input",
        "description": "Channel C forward input on side 2 (BL7142 assignment of the shared VOC/VIC pin); logic input thresholds are VIH ≥ 0.7×VDDI and VIL ≤ 0.25×VDDI."
      },
      {
        "number": "13",
        "name": "VOB",
        "type": "output",
        "description": "Channel B output on side 2, following input VIB across the isolation barrier; default level set by the L/H suffix when side-1 power or signal is lost."
      },
      {
        "number": "14",
        "name": "VOA",
        "type": "output",
        "description": "Channel A output on side 2, following input VIA across the isolation barrier; default level set by the L/H suffix when side-1 power or signal is lost."
      },
      {
        "number": "15",
        "name": "GND2",
        "type": "power_in",
        "description": "Side-2 reference ground (second side-2 ground pin)."
      },
      {
        "number": "16",
        "name": "VDD2",
        "type": "power_in",
        "description": "Side-2 supply; recommended VDD2 range is 2.35 V to 5.5 V, with a 100 nF bypass capacitor."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The pin-function table on page 11 lists shared names (VIC/VOC, VID/VOD, VOD/VID, VOC/VIC) for varian; The page-11 pin table names pin 7 'NC/EN1', but the BL7142 figure and the BL7142 application circuit; The datasheet has no per-pin electrical type table; ERC types were inferred from function descriptio"
        ],
        "pages_sent": 16,
        "cost_usd": 0.0835,
        "at": "2026-10-21T01:33:01"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590904913482227712",
        "pages": 16,
        "sha256": "92b7c28285aa66e6",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 16,
        "described": 16,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
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        "file": "bl7142wl.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          9.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "d5eeddb4c0b304dc61950919b126fc61d7586abd5f16ab71a2a79759ec6498bf",
        "checked": "2026-10-21",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "bl7142wl-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
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          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "712bc0251d3bea03fdf8bc8857b4a2efab5038e6097823a10ced77b2635de717",
        "checked": "2026-10-21",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}