← Commit history

Initial commit: component/bl7121ah

Ray ·02ace456ba ·2mo ago
2 files changed +81
README.mdadded+47
@@ -0,0 +1,47 @@+# BL7121AH++**BL Shanghai Belling** · Digital Isolators · SOIC-8++BL7121AH from BL Shanghai Belling, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VDD1 | power_in | Side 1 power supply, 2.5 V to 5.5 V (recommended). Requires a 0.1 uF bypass capacitor to GND1 close to the pin. Absolute max 6 V. |+| 2 | VOA | output | Channel A digital output on side 1 (reverse channel). Referenced to VDD1/GND1. Drives IOH up to -4 mA / IOL up to 4 mA at 5 V supply. Default state is HIGH (AH suffix) when input power or signal is lost. |+| 3 | VIB | input | Channel B digital input on side 1 (forward channel). Referenced to VDD1/GND1. VIH >= 0.7*VDD1, VIL <= 0.25*VDD1. High-Z if left open (output goes to default HIGH state). |+| 4 | GND1 | power_in | Ground reference for side 1 (VDD1 domain). Isolated from GND2 by the SiO2 capacitive barrier (up to 3750 VRMS working isolation). |+| 5 | GND2 | power_in | Ground reference for side 2 (VDD2 domain). Isolated from GND1 by the SiO2 capacitive barrier. |+| 6 | VOB | output | Channel B digital output on side 2 (forward channel). Referenced to VDD2/GND2. Drives IOH up to -4 mA / IOL up to 4 mA at 5 V supply. Default state is HIGH (AH suffix) when input power or signal is lost. |+| 7 | VIA | input | Channel A digital input on side 2 (reverse channel). Referenced to VDD2/GND2. VIH >= 0.7*VDD2, VIL <= 0.25*VDD2. High-Z if left open (output goes to default HIGH state). |+| 8 | VDD2 | power_in | Side 2 power supply, 2.5 V to 5.5 V (recommended). Requires a 0.1 uF bypass capacitor to GND2 close to the pin. Absolute max 6 V. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | BL Shanghai Belling |+| Package | SOIC-8 |+| Category | Comm/UART |+| Pins | 8 |++## Ordering variants++- `BL7121AH`++## CAD (KiCad official)++- Symbol: `BL7121AH`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SOIC-8 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [BL Shanghai Belling datasheet](docs/bl7121ah-datasheet.pdf) (13 pp, sha256 `b22900b73aef2795`, retrieved 2026-08-17, tier: lcsc)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/bl7121ah-datasheet.pdf)
page.jsonadded+34
@@ -0,0 +1,34 @@+{+  "slug": "bl7121ah",+  "version": "0.1.0",+  "type": "component",+  "description": "BL Shanghai Belling Digital Isolators, SOIC-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "comm-uart",+    "bl7121ah"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "bl7121ah.kicad_sym",+    "bl7121ah.kicad_mod",+    "bl7121ah.glb",+    "bl7121ah.step",+    "bl7121ah.lbr",+    "docs/hero.png",+    "docs/bl7121ah-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "visibility": "public",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file