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bl25cm1a-parc: factory component page (tier=lcsc)

Ray ·ba1de84349 ·2mo ago ·parent fbf83a1
1 file changed +122−8
page.json+122−8
@@ -1,13 +1,132 @@ {+  "schema_version": 1,+  "type": "component",   "slug": "bl25cm1a-parc",+  "title": "BL25CM1A-PARC",+  "brief": "BL Shanghai Belling EEPROM, SOP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.",   "version": "0.1.0",-  "type": "component",-  "description": "BL Shanghai Belling EEPROM, SOP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "license": "CC-BY-SA-4.0",   "tags": [     "component",     "memory",     "bl25cm1a-parc"   ],+  "component": {+    "mpn": "BL25CM1A-PARC",+    "manufacturer": "BL Shanghai Belling",+    "package": "SOP-8",+    "pin_count": 8,+    "category": "Memory",+    "subcategory": "EEPROM",+    "datasheet": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2201130930_BL-Shanghai-Belling-BL25CM1A-PARC_C2943349.pdf",+    "parts": {+      "symbol": "bl25cm1a-parc.kicad_sym",+      "footprint": "bl25cm1a-parc.kicad_mod",+      "model_3d": "bl25cm1a-parc.glb",+      "model_3d_step": "bl25cm1a-parc.step",+      "lbr": "bl25cm1a-parc.lbr"+    },+    "distributor_links": {},+    "pins": [+      {+        "number": "1",+        "name": "/CS",+        "type": "input",+        "description": "SPI Chip Select, active low. When /CS is high, the device is deselected and SO is placed at high impedance; power consumption drops to standby unless an internal write cycle is in progress. Driving /CS low selects the device so that instructions can be clocked in on SI. After power-up, /CS must transition high to low before a new instruction is accepted."+      },+      {+        "number": "2",+        "name": "SO",+        "type": "output",+        "description": "SPI Serial Data Output. Data or status is shifted out of this pin on the falling edge of SCK. SO is placed at high impedance when the device is deselected (/CS high) or when /HOLD is asserted low."+      },+      {+        "number": "3",+        "name": "/WP",+        "type": "input",+        "description": "Write Protect, active low. Used together with the Status Register Write Disable (SRWD) bit to enable the Hardware Protected mode: when SRWD = 1 and /WP is driven low, writes to the Status Register and to block-protected memory are inhibited. Tie high to disable hardware write protection."+      },+      {+        "number": "4",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground reference for supply and all signals. Connect to the system ground plane."+      },+      {+        "number": "5",+        "name": "SI",+        "type": "input",+        "description": "SPI Serial Data Input. Instructions, addresses and write data are clocked into the device on the rising edge of SCK."+      },+      {+        "number": "6",+        "name": "SCK",+        "type": "input",+        "description": "SPI Serial Clock Input. Provides the timing for serial input and output operations; SI is sampled on the rising edge and SO changes on the falling edge. Supports SPI modes (0,0) and (1,1); maximum frequency is 2 MHz for BL25CM1A and 5 MHz for BL25CM1A5."+      },+      {+        "number": "7",+        "name": "/HOLD",+        "type": "input",+        "description": "Hold input, active low. Pausing the device while it is actively selected: when /HOLD is low while /CS is also low, SO is placed at high impedance and signals on SI and SCK are ignored (don't care). Driving /HOLD high resumes device operation. Useful when multiple devices share the SPI bus; tie high if unused."+      },+      {+        "number": "8",+        "name": "VCC",+        "type": "power_in",+        "description": "Power supply, 2.8 V to 5.5 V. Decouple to VSS with a local bypass capacitor (typically 100 nF) close to the pin."+      }+    ],+    "provenance": {+      "extractor": "ds2sf",+      "datasheet": {+        "url": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2201130930_BL-Shanghai-Belling-BL25CM1A-PARC_C2943349.pdf",+        "pages": 21,+        "sha256": "ff7e0e771d288dc6",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 8,+        "described": 8,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "metadata": {+    "specs": {+      "Manufacturer": "BL Shanghai Belling",+      "Package": "SOP-8",+      "Category": "Memory",+      "Pins": "8"+    }+  },+  "variants": [+    {+      "mpn": "BL25CM1A-PARC",+      "kind": "packaging"+    }+  ],+  "sections": [+    "hero",+    "viewers",+    "readme",+    "breadcrumbs",+    "info"+  ],+  "discovery_triggers": [+    "bl25cm1a-parc"+  ],+  "discovery_pitch": "BL25CM1A-PARC (BL Shanghai Belling) component page with datasheet-verified CAD.",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  },   "dependencies": {},   "hero": {     "type": "image",@@ -25,10 +144,5 @@     "docs/bl25cm1a-parc-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ],-  "visibility": "public",-  "author": {-    "name": "Ray",-    "email": "[email protected]"-  }+  ] }\ No newline at end of file