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BL24C128AE0-PARC

BL(Shanghai Belling) · EEPROM · SOP-8

BL24C128AE0-PARC from BL(Shanghai Belling), in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A0 input Device address input, hard-wired; with A1 and A2 it allows up to eight devices on one bus and floats to logic low if left unconnected.
2 A1 input Device address input, hard-wired; with A0 and A2 it allows up to eight devices on one bus and floats to logic low if left unconnected.
3 A2 input Device address input, hard-wired; with A0 and A1 it allows up to eight devices on one bus and floats to logic low if left unconnected.
4 GND power_in Ground.
5 SDA bidirectional Bidirectional serial data pin, open-drain and wire-ORable with other open-drain or open-collector devices, needing an external pull-up.
6 SCL input Serial clock input that clocks data into the device on the positive edge and out on the negative edge.
7 WP input Write protect input: connected to GND it allows normal read/write operations, connected to VCC it write-protects the full 128K array.
8 VCC power_in Power supply, 1.7V to 5.5V (2.5V to 5.5V at 1 MHz).

Key specifications

Parameter Value
Manufacturer BL(Shanghai Belling)
Package SOP-8
Category Memory
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Current READ ICC1 0.14 0.3 mA VCC=5.0V, READ at 400KHZ 9
Supply Current WRITE ICC2 0.28 0.5 mA VCC=5.0V, WRITE at 400KHZ 9
Standby Supply Current ISB1 0.03 0.5 μA VCC=5.0V, VIN=VCC or VSS 9
Input Leakage Current IL1 0.1 1 μA VIN=VCC or VSS 9
Output Leakage Current ILO 0.05 1 μA VOUT=VCC or VSS 9
Input Low Level VIL1 -0.3 0.3 V VCC=1.7V to 5.5V; max printed as VCC×0.3 9
Input High Level VIH1 0.7 V VCC=1.7V to 5.5V; min printed as VCC×0.7, max VCC+0.3 9
Output Low Level VOL1 0.2 V VCC=1.7V, IOL=0.15mA 9
Output Low Level VOL2 0.4 V VCC=5.0V, IOL=3.0mA 9
Input/Output Capacitance (SDA) CI/O 8 pF TA=25℃, f=1.0MHz, VCC=1.7V, VIO=0V 9
Input Capacitance (A0,A1,A2,SCL) CIN 6 pF TA=25℃, f=1.0MHz, VCC=1.7V, VIN=0V 9
Clock Frequency SCL (1.7V≤VCC<2.5V) fSCL 400 kHz 1.7V≤VCC<2.5V, CL=100 pF 10
Clock Frequency SCL (2.5V≤VCC<5.5V) fSCL 1000 kHz 2.5V≤VCC<5.5V, CL=100 pF 10
Clock Pulse Width Low (1.7V≤VCC<2.5V) tLOW 1.3 μs 1.7V≤VCC<2.5V 10
Clock Pulse Width Low (2.5V≤VCC<5.5V) tLOW 0.5 μs 2.5V≤VCC<5.5V 10
Clock Pulse Width High (1.7V≤VCC<2.5V) tHIGH 0.6 μs 1.7V≤VCC<2.5V 10
Clock Pulse Width High (2.5V≤VCC<5.5V) tHIGH 0.26 μs 2.5V≤VCC<5.5V 10
Noise Suppression Time (1.7V≤VCC<2.5V) tI 50 ns 1.7V≤VCC<2.5V 10
Noise Suppression Time (2.5V≤VCC<5.5V) tI 50 ns 2.5V≤VCC<5.5V 10
Clock Low to Data Out Valid (1.7V≤VCC<2.5V) tAA 0.9 μs 1.7V≤VCC<2.5V 10
Clock Low to Data Out Valid (2.5V≤VCC<5.5V) tAA 0.45 μs 2.5V≤VCC<5.5V 10
Bus free time before new transmission (1.7V≤VCC<2.5V) tBUF 1.3 μs 1.7V≤VCC<2.5V 10
Bus free time before new transmission (2.5V≤VCC<5.5V) tBUF 0.5 μs 2.5V≤VCC<5.5V 10
Start Hold Time (1.7V≤VCC<2.5V) tHD:STA 0.6 μs 1.7V≤VCC<2.5V 10
Start Hold Time (2.5V≤VCC<5.5V) tHD:STA 0.25 μs 2.5V≤VCC<5.5V 10
Start Setup Time (1.7V≤VCC<2.5V) tSU:STA 0.6 μs 1.7V≤VCC<2.5V 10
Start Setup Time (2.5V≤VCC<5.5V) tSU:STA 0.25 μs 2.5V≤VCC<5.5V 10
Data In Hold Time (1.7V≤VCC<2.5V) tHD:DAT 0 μs 1.7V≤VCC<2.5V 10
Data In Hold Time (2.5V≤VCC<5.5V) tHD:DAT 0 μs 2.5V≤VCC<5.5V 10
Data in Setup Time (1.7V≤VCC<2.5V) tSU:DAT 100 ns 1.7V≤VCC<2.5V 10
Data in Setup Time (2.5V≤VCC<5.5V) tSU:DAT 100 ns 2.5V≤VCC<5.5V 10
Input Rise Time (1.7V≤VCC<2.5V) tR 0.3 μs 1.7V≤VCC<2.5V 10
Input Rise Time (2.5V≤VCC<5.5V) tR 0.12 μs 2.5V≤VCC<5.5V 10
Input Fall Time (1.7V≤VCC<2.5V) tF 0.3 μs 1.7V≤VCC<2.5V 10
Input Fall Time (2.5V≤VCC<5.5V) tF 0.12 μs 2.5V≤VCC<5.5V 10
Stop Setup Time (1.7V≤VCC<2.5V) tSu:STO 0.6 μs 1.7V≤VCC<2.5V 10
Stop Setup Time (2.5V≤VCC<5.5V) tSu:STO 0.25 μs 2.5V≤VCC<5.5V 10
Data Out Hold Time (1.7V≤VCC<2.5V) tDH 50 ns 1.7V≤VCC<2.5V 10
Data Out Hold Time (2.5V≤VCC<5.5V) tDH 50 ns 2.5V≤VCC<5.5V 10
Write Cycle Time (1.7V≤VCC<2.5V) twR 1.9 3 ms 1.7V≤VCC<2.5V 10
Write Cycle Time (2.5V≤VCC<5.5V) twR 1.9 3 ms 2.5V≤VCC<5.5V 10
DC Supply Voltage VCC -0.3 6.5 V 9
Input / Output Voltage -0.3 V GND-0.3V to VCC+0.3V 9
Storage Temperature -65 150 ℃ 9
Electrostatic pulse (Human Body model) 8000 V 9
Operating Ambient Temperature (E0) TA -40 125 ℃ BL24C128AE0 9
Supply Voltage VCC 1.7 5.5 V @400kHz; 2.5V to 5.5V @1MHz 9

CAD (KiCad official)

  • Symbol: BL24C128AE0-PARC
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: bl24c128ae0-parc-etched.step / bl24c128ae0-parc-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); bl24c128ae0-parc.step / bl24c128ae0-parc.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: BL(Shanghai Belling) datasheet (19 pp, sha256 70a9a1418e80f8fc, retrieved 2026-10-22, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF