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BL24C08F-RRRC

BL(Shanghai Belling) · EEPROM · TSOT-23-5L

BL24C08F-RRRC from BL(Shanghai Belling), in a TSOT-23-5L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SCL input Serial clock input that clocks data into the EEPROM on the positive edge and out of it on the negative edge.
2 GND power_in Ground.
3 SDA bidirectional Bidirectional serial data pin, open-drain driven, may be wire-ORed with other open-drain or open-collector devices and needs an external pull-up.
4 VCC power_in Power supply, 1.7V to 5.5V at 400kHz or 2.5V to 5.5V at 1MHz (absolute maximum -0.3V to +6.5V).
5 WP input Write protect input: connected to GND allows normal read/write operations, connected to VCC write-protects the full 8K array.

Key specifications

Parameter Value
Manufacturer BL(Shanghai Belling)
Package TSOT-23-5L
Category Memory
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
DC Supply Voltage (abs max) VCC -0.3 6.5 V 8
Storage Temperature -65 150 °C 8
Electrostatic pulse (HBM) 5000 V Human Body model 8
Supply Voltage at 400 kHz VCC 1.7 5.5 V @400kHz 8
Supply Voltage at 1 MHz VCC 2.5 5.5 V @1MHz 8
Operating Temperature TA -40 85 °C BL24C08F (blank temperature code) 8
Supply Current READ ICC1 0.14 0.3 mA VCC=5.0V, READ at 400KHZ 8
Supply Current WRITE ICC2 0.28 0.5 mA VCC=5.0V, WRITE at 400KHZ 8
Standby Current ISB1 0.03 0.5 μA VCC=5.0V, VIN=VCC or VSS 8
Input Leakage Current IL1 0.1 1 μA VIN=VCC or VSS 8
Output Leakage Current ILO 0.05 1 μA VOUT=VCC or VSS 8
Input Low Level (min only; max is VCC×0.3) VIL1 -0.3 V VCC=1.7V to 5.5V 8
Output Low Level VOL1 0.2 V VCC=1.7V, IOL=0.15mA 8
Output Low Level VOL2 0.4 V VCC=5.0V, IOL=3.0mA 8
Input/Output Capacitance (SDA) CI/O 8 pF TA=25℃, f=1.0MHz, VCC=2.5V, VIO=0V 8
Input Capacitance (A2,SCL) CIN 6 pF TA=25℃, f=1.0MHz, VCC=2.5V, VIN=0V 8
Clock Frequency, SCL fSCL 400 kHz 1.7V≤VCC<2.5V 9
Clock Frequency, SCL fSCL 1000 kHz 2.5V≤VCC<5.5V 9
Clock Pulse Width Low tLOW 1.3 μs 1.7V≤VCC<2.5V 9
Clock Pulse Width Low tLOW 0.5 μs 2.5V≤VCC<5.5V 9
Clock Pulse Width High tHIGH 0.6 μs 1.7V≤VCC<2.5V 9
Clock Pulse Width High tHIGH 0.26 μs 2.5V≤VCC<5.5V 9
Noise Suppression Time tI 50 ns 1.7V≤VCC<2.5V 9
Clock Low to Data Out Valid tAA 0.9 μs 1.7V≤VCC<2.5V 9
Clock Low to Data Out Valid tAA 0.45 μs 2.5V≤VCC<5.5V 9
Bus free time before new transmission tBUF 1.3 μs 1.7V≤VCC<2.5V 9
Bus free time before new transmission tBUF 0.5 μs 2.5V≤VCC<5.5V 9
Start Hold Time tHD:STA 0.6 μs 1.7V≤VCC<2.5V 9
Start Hold Time tHD:STA 0.25 μs 2.5V≤VCC<5.5V 9
Start Setup Time tSU:STA 0.6 μs 1.7V≤VCC<2.5V 9
Start Setup Time tSU:STA 0.25 μs 2.5V≤VCC<5.5V 9
Data In Hold Time tHD:DAT 0 μs 1.7V≤VCC<2.5V 9
Data in Setup Time tSU:DAT 100 ns 1.7V≤VCC<2.5V 9
Input Rise Time tR 0.3 μs 1.7V≤VCC<2.5V; characterized, not 100% tested 9
Input Rise Time tR 0.12 μs 2.5V≤VCC<5.5V; characterized, not 100% tested 9
Input Fall Time tF 0.3 μs 1.7V≤VCC<2.5V; characterized, not 100% tested 9
Input Fall Time tF 0.12 μs 2.5V≤VCC<5.5V; characterized, not 100% tested 9
Stop Setup Time tSu:STO 0.6 μs 1.7V≤VCC<2.5V 9
Stop Setup Time tSu:STO 0.25 μs 2.5V≤VCC<5.5V 9
Data Out Hold Time tDH 50 ns 1.7V≤VCC<2.5V 9
Write Cycle Time twR 1.9 3 ms 1.7V≤VCC<2.5V 9

CAD (KiCad official)

  • Symbol: BL24C08F-RRRC
  • Footprint: Package_TO_SOT_SMD:TSOT-23-5
  • 3D model: TSOT-23-5L (KiCad packages3D, STEP)
  • 3D model files: bl24c08f-rrrc-etched.step / bl24c08f-rrrc-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); bl24c08f-rrrc.step / bl24c08f-rrrc.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: BL(Shanghai Belling) datasheet (19 pp, sha256 625b96ed9374bf6d, retrieved 2026-10-22, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF