component
BL1118CS8TRAD33
Public Made by Adomby adom
BL Shanghai Belling Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, ESOP-8-EP. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownBL1118CS8TRAD33
BL Shanghai Belling · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · ESOP-8-EP
BL1118CS8TRAD33 from BL Shanghai Belling, in a ESOP-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND/ADJ | power_in | Channel 1 ground (fixed-output version) or adjust pin (adjustable version). In the adjustable configuration, this pin is tied to the resistor divider midpoint; the regulator forces 1.25V between Vout1 and this pin. Adjust-pin current is typically 55uA (max 120uA). |
| 2 | Vin1 | power_in | Channel 1 input supply. Operating range up to 12V max. Bypass with a 10uF input capacitor (tantalum, electrolytic, or MLCC) close to the pin. |
| 3 | GND/ADJ | power_in | Channel 2 ground (fixed-output version) or adjust pin (adjustable version). In the adjustable configuration this pin is the feedback node driven to 1.25V above the corresponding output. |
| 4 | Vin2 | power_in | Channel 2 input supply. Operating range up to 12V max. Bypass with a 10uF input capacitor close to the pin. Pin configuration is customizable on demand so both channels can share a single input. |
| 5 | Vout2 | power_out | Channel 2 regulated output. Tied together with pin 6 to share current up to 1A. Requires a 10uF output capacitor. |
| 6 | Vout2 | power_out | Channel 2 regulated output (paralleled with pin 5). Fixed at 1.2/1.8/2.5/3.3/5V per ordering code, or set by external divider on the ADJ variant. 1A maximum with typical 1.3V dropout. |
| 7 | Vout1 | power_out | Channel 1 regulated output (paralleled with pin 8). Requires a 10uF output capacitor. 1A maximum with typical 1.3V dropout. |
| 8 | Vout1 | power_out | Channel 1 regulated output (paralleled with pin 7). Fixed at 1.2/1.8/2.5/3.3/5V per ordering code, or set by external divider on the ADJ variant. |
| 9 | EP | power_in | Exposed thermal pad on the underside of the ESOP-8 package. Solder to a ground copper pour for heat dissipation; theta-JC = 10 C/W, theta-JA = 63 C/W. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | BL Shanghai Belling |
| Package | ESOP-8-EP |
| Category | PMIC |
| Pins | 9 |
Ordering variants
BL1118CS8TRAD33BL1118CS8TRAD33CS8TR3333BL1118CS8TRAD33CS8TRADAD
CAD (KiCad official)
- Symbol:
BL1118CS8TRAD33 - Footprint:
Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm - 3D model: ESOP-8-EP (KiCad packages3D, STEP)
- 3D model files:
bl1118cs8trad33-etched.step/bl1118cs8trad33-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);bl1118cs8trad33.step/bl1118cs8trad33.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: BL Shanghai Belling datasheet (8 pp, sha256
85526dbc6c09a729, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).