component
BIN1051S-C
Public Made by Adomby adom
BORN CAN Transceivers, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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BIN1051S-C
BORN · CAN Transceivers · SOIC-8
BIN1051S-C from BORN, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | TXD | input | Transmitter data input: driving TXD low makes CANH/CANL dominant and high makes them recessive, with a dominant state held longer than tDOM (2 to 8 ms) released by the timeout and an internal weak pull-up to VCC or VIO. |
| 2 | GND | power_in | Ground reference for the device. |
| 3 | VCC | power_in | 5 V supply input (4.5 V to 5.5 V recommended); place a bypass capacitor of at least 0.1 µF between VCC and GND, located close to the pin. |
| 4 | RXD | output | Receiver data output that is high when the bus is recessive or open and low when the bus is dominant, with recommended output current limits of -2 mA (IOH) and 2 mA (IOL). |
| 5 | NC | unconnected | No internal connection; leave floating and do not connect externally. |
| 6 | CANL | bidirectional | Low-level CAN bus line for the differential CAN bus I/O, with ±58 V fault protection and a common-mode input range of ±30 V. |
| 7 | CANH | bidirectional | High-level CAN bus line for the differential CAN bus I/O, with ±58 V fault protection and a common-mode input range of ±30 V. |
| 8 | S | input | Silent mode control: high places the transmitter in silent mode (receiver stays active), while low or open selects normal mode; the pin has an internal pull-down. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | BORN |
| Package | SOIC-8 |
| Category | Interface |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VCC 5V supply voltage (absolute max) | VCC | -0.3 | 7 | V | 3 | ||
| CAN bus I/O voltage (CANH, CANL) | VBUS | -58 | 58 | V | 3 | ||
| Maximum differential voltage CANH to CANL | V(DIFF) | -58 | 58 | V | 3 | ||
| Logic-side input voltage (TXD, S) | V(Logic_Input) | -0.3 | 7 | V | 3 | ||
| Logic-side output voltage (RXD) | V(Logic_Output) | -0.3 | 7 | V | 3 | ||
| RXD receiver output current | IO(RXD) | -8 | 8 | mA | 3 | ||
| Junction temperature | TJ | -55 | 150 | °C | 3 | ||
| Storage temperature | TSTG | -65 | 150 | °C | 3 | ||
| VCC 5V supply voltage (recommended) | VCC | 4.5 | 5.5 | V | 3 | ||
| RXD port output current @ high level | IOH(RXD) | -2 | mA | 3 | |||
| RXD port output current @ low level | IOL(RXD) | 2 | mA | 3 | |||
| 5V supply current, dominant | ICC | 40 | 70 | mA | TXD = 0V , RL = 60 Ω(显性), 图 14 | 4 | |
| 5V supply current, dominant | ICC | 45 | 80 | mA | TXD = 0V , RL = 50 Ω(显性), 图 14 | 4 | |
| 5V supply current, dominant with bus short | ICC | 180 | mA | TXD = 0V , CANH = -12V(显性), 图 14 | 4 | ||
| 5V supply current, recessive | ICC | 0.7 | 2.5 | mA | TXD = VCC , RL = 50 Ω(隐性), 图 14 | 4 | |
| 5V supply current, silent mode | ICC | 0.6 | 2.5 | mA | S = VCC(静音模式) , 图 14 | 4 | |
| VCC UVLO voltage, rising | VUV_VCC | 4.2 | 4.4 | V | 上升 | 4 | |
| VCC UVLO voltage, falling | VUV_VCC | 3.8 | 4 | 4.25 | V | 下降 | 4 |
| S mode-select input high level | VIH | 2 | V | 4 | |||
| S mode-select input low level | VIL | 0.8 | V | 4 | |||
| S input high-level leakage current | IIH | 30 | uA | S = VCC or VIO = 5.5V | 4 | ||
| S input low-level leakage current | IIL | -2 | 2 | uA | S = 0V ,VCC = VIO = 5.5V | 4 | |
| S input leakage current, unpowered | Ilek(off) | -1 | 1 | uA | S = 5.5V ,VCC = VIO = 0V | 4 | |
| TXD input high level | VIH | 2 | V | 4 | |||
| TXD input low level | VIL | 0.8 | V | 4 | |||
| TXD input high-level leakage current | IIH | -2.5 | 0 | 1 | uA | TXD = VCC = VIO = 5.5V | 4 |
| TXD input low-level leakage current | IIL | -100 | -47 | -7 | uA | TXD = 0V ,VCC = VIO = 5.5V | 4 |
| TXD input leakage current, unpowered | Ilek(off) | -1 | 0 | 1 | uA | TXD = 5.5V ,VCC = VIO = 0V | 4 |
| RXD output high level | VOH | 4 | 4.6 | V | 4 | ||
| RXD output low level | VOL | 0.2 | 0.4 | V | 4 | ||
| RXD output leakage current, unpowered | Ilek(off) | -1 | 0 | 1 | uA | RXD = 5.5V ,VCC = VIO = 0V | 4 |
| Bus single-ended output voltage, dominant, CANH | VO(DOM) | 2.75 | 4.5 | V | TXD = 低电平, S = 0V , RL = 50-65Ω , CANH 端口, 如图 14 | 5 | |
| Bus single-ended output voltage, dominant, CANL | VO(DOM) | 0.5 | 2.25 | V | TXD = 低电平, S = 0V , RL = 50-65Ω , CANL 端口, 如图 14 | 5 | |
| Bus differential output voltage, dominant | VOD(DOM) | 1.5 | 3 | V | TXD = 低电平, RL = 60Ω , RCM = 165Ω , -5V ≤ VCM ≤ +10V | 5 | |
| Bus differential output voltage, dominant | VOD(DOM) | 1.4 | 3 | V | TXD = 低电平, RL = 45-50Ω , RCM open , 如图 14 | 5 | |
| Bus differential output voltage, dominant | VOD(DOM) | 1.5 | 5 | V | TXD = 低电平, RL = 2240Ω , RCM open , 如图 14 | 5 | |
| Bus single-ended output voltage, recessive, CANH | VO(REC) | 2 | 3 | V | TXD = 高电平, 空载, CANH 端口, 如图 14 | 5 | |
| Bus single-ended output voltage, recessive, CANL | VO(REC) | 2 | 3 | V | TXD = 高电平, 空载, CANL 端口, 如图 14 | 5 | |
| Bus differential output voltage, recessive | VOD(REC) | -120 | 12 | mV | TXD = 高电平, S = 0V , RL = 60 Ω , 如图 14 | 5 | |
| Bus differential output voltage, recessive, no load | VOD(REC) | -50 | 50 | mV | TXD = 高电平, S = 0V , 空载, 如图 14 | 5 | |
| Short-circuit current, dominant (CANL open) | IOS(SS_DOM) | -100 | mA | TXD = 低电平, CANL 开路, CANH = -15V to 40V, 如图 20 | 5 | ||
| Short-circuit current, dominant (CANH open) | IOS(SS_DOM) | 100 | mA | TXD = 低电平, CANH 开路, CANL = -15V to 40V | 5 | ||
| Short-circuit current, recessive | IOS(SS_rec) | -5 | 5 | mA | TXD = 高电平, VBUS = -27 to 32V, 如图 20 | 5 | |
| Transient symmetry (dominant and recessive) | Vsys | 0.9 | 1.1 | V/V | RL = 60 Ω , RCM open , TXD = 250kHz or 1MHz, 如图 14 | 5 | |
| DC symmetry (dominant and recessive) | Vsys_dc | -0.4 | 0.4 | V | RL = 60 Ω , RCM open , 如图 14 | 5 | |
| Common-mode input range, CANH or CANL to GND | VCM | -30 | 30 | V | CANH 或 CANL 到地, RXD 输出有效, 如图 15 | 5 | |
| Differential input threshold, recessive | VDIFF_R | 0.5 | V | TXD = 高电平, VCM = -20V to 20V , 如图 15 | 5 | ||
| Differential input threshold, dominant | VDIFF_D | 0.9 | V | TXD = 高电平, VCM = -20V to 20V , 如图 15 | 5 | ||
| Differential input threshold, recessive | VDIFF_R | 0.4 | V | TXD = 高电平, VCM = -30V to 30V , 如图 15 | 5 | ||
| Differential input threshold, dominant | VDIFF_D | 1 | V | TXD = 高电平, VCM = -30V to 30V , 如图 15 | 5 | ||
| Differential input hysteresis | VDIFF_(HYST) | 120 | mV | 5 | |||
| CANH/CANL input resistance | RIN | 15 | 40 | kΩ | TXD = 高电平, VCM = -30V to 30V | 5 | |
| Differential input resistance | RDIFF | 30 | 80 | kΩ | TXD = 高电平, VCM = -30V to 30V | 5 | |
| Input resistance matching | RDIFF(M) | -2 | 2 | % | CANH = CANL=5V | 5 | |
| Input leakage current | ILKG | 4.8 | uA | VCC = 0V , VCAN = 5V | 5 | ||
| Single-ended input capacitance (CANH or CANL to GND) | CIN | 24 | 30 | pF | CANH 或者 CANL 到地 | 5 | |
| Differential input capacitance (CANH to CANL) | CIN_DIFF | 12 | 15 | pF | CANH 到 CANL | 5 | |
| TXD dominant timeout | tDOM | 2 | 5 | 8 | ms | RL=60Ω, CL open, 如图 14 | 6 |
| Thermal resistance, junction to ambient, SOIC8 | RθJA | 125 | °C/W | 3 |
CAD (KiCad official)
- Symbol:
BIN1051S-C - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
bin1051s-c-etched.step/bin1051s-c-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);bin1051s-c.step/bin1051s-c.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: BORN datasheet (19 pp, sha256
612d8c5446177e1b, retrieved 2026-10-19, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# BIN1051S-C
**BORN** · CAN Transceivers · SOIC-8
BIN1051S-C from BORN, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | TXD | input | Transmitter data input: driving TXD low makes CANH/CANL dominant and high makes them recessive, with a dominant state held longer than tDOM (2 to 8 ms) released by the timeout and an internal weak pull-up to VCC or VIO. |
| 2 | GND | power_in | Ground reference for the device. |
| 3 | VCC | power_in | 5 V supply input (4.5 V to 5.5 V recommended); place a bypass capacitor of at least 0.1 µF between VCC and GND, located close to the pin. |
| 4 | RXD | output | Receiver data output that is high when the bus is recessive or open and low when the bus is dominant, with recommended output current limits of -2 mA (IOH) and 2 mA (IOL). |
| 5 | NC | unconnected | No internal connection; leave floating and do not connect externally. |
| 6 | CANL | bidirectional | Low-level CAN bus line for the differential CAN bus I/O, with ±58 V fault protection and a common-mode input range of ±30 V. |
| 7 | CANH | bidirectional | High-level CAN bus line for the differential CAN bus I/O, with ±58 V fault protection and a common-mode input range of ±30 V. |
| 8 | S | input | Silent mode control: high places the transmitter in silent mode (receiver stays active), while low or open selects normal mode; the pin has an internal pull-down. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | BORN |
| Package | SOIC-8 |
| Category | Interface |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VCC 5V supply voltage (absolute max) | VCC | -0.3 | | 7 | V | | 3 |
| CAN bus I/O voltage (CANH, CANL) | VBUS | -58 | | 58 | V | | 3 |
| Maximum differential voltage CANH to CANL | V(DIFF) | -58 | | 58 | V | | 3 |
| Logic-side input voltage (TXD, S) | V(Logic_Input) | -0.3 | | 7 | V | | 3 |
| Logic-side output voltage (RXD) | V(Logic_Output) | -0.3 | | 7 | V | | 3 |
| RXD receiver output current | IO(RXD) | -8 | | 8 | mA | | 3 |
| Junction temperature | TJ | -55 | | 150 | °C | | 3 |
| Storage temperature | TSTG | -65 | | 150 | °C | | 3 |
| VCC 5V supply voltage (recommended) | VCC | 4.5 | | 5.5 | V | | 3 |
| RXD port output current @ high level | IOH(RXD) | -2 | | | mA | | 3 |
| RXD port output current @ low level | IOL(RXD) | | | 2 | mA | | 3 |
| 5V supply current, dominant | ICC | | 40 | 70 | mA | TXD = 0V , RL = 60 Ω(显性), 图 14 | 4 |
| 5V supply current, dominant | ICC | | 45 | 80 | mA | TXD = 0V , RL = 50 Ω(显性), 图 14 | 4 |
| 5V supply current, dominant with bus short | ICC | | | 180 | mA | TXD = 0V , CANH = -12V(显性), 图 14 | 4 |
| 5V supply current, recessive | ICC | | 0.7 | 2.5 | mA | TXD = VCC , RL = 50 Ω(隐性), 图 14 | 4 |
| 5V supply current, silent mode | ICC | | 0.6 | 2.5 | mA | S = VCC(静音模式) , 图 14 | 4 |
| VCC UVLO voltage, rising | VUV_VCC | | 4.2 | 4.4 | V | 上升 | 4 |
| VCC UVLO voltage, falling | VUV_VCC | 3.8 | 4 | 4.25 | V | 下降 | 4 |
| S mode-select input high level | VIH | 2 | | | V | | 4 |
| S mode-select input low level | VIL | | | 0.8 | V | | 4 |
| S input high-level leakage current | IIH | | | 30 | uA | S = VCC or VIO = 5.5V | 4 |
| S input low-level leakage current | IIL | -2 | | 2 | uA | S = 0V ,VCC = VIO = 5.5V | 4 |
| S input leakage current, unpowered | Ilek(off) | -1 | | 1 | uA | S = 5.5V ,VCC = VIO = 0V | 4 |
| TXD input high level | VIH | 2 | | | V | | 4 |
| TXD input low level | VIL | | | 0.8 | V | | 4 |
| TXD input high-level leakage current | IIH | -2.5 | 0 | 1 | uA | TXD = VCC = VIO = 5.5V | 4 |
| TXD input low-level leakage current | IIL | -100 | -47 | -7 | uA | TXD = 0V ,VCC = VIO = 5.5V | 4 |
| TXD input leakage current, unpowered | Ilek(off) | -1 | 0 | 1 | uA | TXD = 5.5V ,VCC = VIO = 0V | 4 |
| RXD output high level | VOH | 4 | 4.6 | | V | | 4 |
| RXD output low level | VOL | | 0.2 | 0.4 | V | | 4 |
| RXD output leakage current, unpowered | Ilek(off) | -1 | 0 | 1 | uA | RXD = 5.5V ,VCC = VIO = 0V | 4 |
| Bus single-ended output voltage, dominant, CANH | VO(DOM) | 2.75 | | 4.5 | V | TXD = 低电平, S = 0V , RL = 50-65Ω , CANH 端口, 如图 14 | 5 |
| Bus single-ended output voltage, dominant, CANL | VO(DOM) | 0.5 | | 2.25 | V | TXD = 低电平, S = 0V , RL = 50-65Ω , CANL 端口, 如图 14 | 5 |
| Bus differential output voltage, dominant | VOD(DOM) | 1.5 | | 3 | V | TXD = 低电平, RL = 60Ω , RCM = 165Ω , -5V ≤ VCM ≤ +10V | 5 |
| Bus differential output voltage, dominant | VOD(DOM) | 1.4 | | 3 | V | TXD = 低电平, RL = 45-50Ω , RCM open , 如图 14 | 5 |
| Bus differential output voltage, dominant | VOD(DOM) | 1.5 | | 5 | V | TXD = 低电平, RL = 2240Ω , RCM open , 如图 14 | 5 |
| Bus single-ended output voltage, recessive, CANH | VO(REC) | 2 | | 3 | V | TXD = 高电平, 空载, CANH 端口, 如图 14 | 5 |
| Bus single-ended output voltage, recessive, CANL | VO(REC) | 2 | | 3 | V | TXD = 高电平, 空载, CANL 端口, 如图 14 | 5 |
| Bus differential output voltage, recessive | VOD(REC) | -120 | | 12 | mV | TXD = 高电平, S = 0V , RL = 60 Ω , 如图 14 | 5 |
| Bus differential output voltage, recessive, no load | VOD(REC) | -50 | | 50 | mV | TXD = 高电平, S = 0V , 空载, 如图 14 | 5 |
| Short-circuit current, dominant (CANL open) | IOS(SS_DOM) | -100 | | | mA | TXD = 低电平, CANL 开路, CANH = -15V to 40V, 如图 20 | 5 |
| Short-circuit current, dominant (CANH open) | IOS(SS_DOM) | | | 100 | mA | TXD = 低电平, CANH 开路, CANL = -15V to 40V | 5 |
| Short-circuit current, recessive | IOS(SS_rec) | -5 | | 5 | mA | TXD = 高电平, VBUS = -27 to 32V, 如图 20 | 5 |
| Transient symmetry (dominant and recessive) | Vsys | 0.9 | | 1.1 | V/V | RL = 60 Ω , RCM open , TXD = 250kHz or 1MHz, 如图 14 | 5 |
| DC symmetry (dominant and recessive) | Vsys_dc | -0.4 | | 0.4 | V | RL = 60 Ω , RCM open , 如图 14 | 5 |
| Common-mode input range, CANH or CANL to GND | VCM | -30 | | 30 | V | CANH 或 CANL 到地, RXD 输出有效, 如图 15 | 5 |
| Differential input threshold, recessive | VDIFF_R | 0.5 | | | V | TXD = 高电平, VCM = -20V to 20V , 如图 15 | 5 |
| Differential input threshold, dominant | VDIFF_D | | | 0.9 | V | TXD = 高电平, VCM = -20V to 20V , 如图 15 | 5 |
| Differential input threshold, recessive | VDIFF_R | 0.4 | | | V | TXD = 高电平, VCM = -30V to 30V , 如图 15 | 5 |
| Differential input threshold, dominant | VDIFF_D | | | 1 | V | TXD = 高电平, VCM = -30V to 30V , 如图 15 | 5 |
| Differential input hysteresis | VDIFF_(HYST) | | | 120 | mV | | 5 |
| CANH/CANL input resistance | RIN | 15 | | 40 | kΩ | TXD = 高电平, VCM = -30V to 30V | 5 |
| Differential input resistance | RDIFF | 30 | | 80 | kΩ | TXD = 高电平, VCM = -30V to 30V | 5 |
| Input resistance matching | RDIFF(M) | -2 | | 2 | % | CANH = CANL=5V | 5 |
| Input leakage current | ILKG | | | 4.8 | uA | VCC = 0V , VCAN = 5V | 5 |
| Single-ended input capacitance (CANH or CANL to GND) | CIN | | 24 | 30 | pF | CANH 或者 CANL 到地 | 5 |
| Differential input capacitance (CANH to CANL) | CIN_DIFF | | 12 | 15 | pF | CANH 到 CANL | 5 |
| TXD dominant timeout | tDOM | 2 | 5 | 8 | ms | RL=60Ω, CL open, 如图 14 | 6 |
| Thermal resistance, junction to ambient, SOIC8 | RθJA | | 125 | | °C/W | | 3 |
## CAD (KiCad official)
- Symbol: `BIN1051S-C`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `bin1051s-c-etched.step` / `bin1051s-c-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `bin1051s-c.step` / `bin1051s-c.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [BORN datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603358151605297152) (19 pp, sha256 `612d8c5446177e1b`, retrieved 2026-10-19, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/bin1051s-c-datasheet.pdf)