component
BD9P135EFV-CE2
Public Made by Adomby adom
ROHM Semicon DC-DC Converters, HTSSOP-20-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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"description": "ROHM Semicon DC-DC Converters, HTSSOP-20-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
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"component": {
"mpn": "BD9P135EFV-CE2",
"manufacturer": "ROHM Semicon",
"package": "HTSSOP-20-EP",
"pin_count": 21,
"category": "Power Management ICs",
"subcategory": "DC-DC Converters",
"datasheet": "https://datasheet.lcsc.com/datasheet/pdf/705bc1aac3f4c1501284972a60bfdcd3.pdf",
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"distributor_links": {
"lcsc": "C1518759",
"digikey": "846-BD9P135EFV-CE2TR-ND",
"mouser": "755-BD9P135EFV-CE2"
},
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},
"pins": [
{
"number": "1",
"name": "EN",
"type": "input",
"description": "Enable pin: apply 0.8 V or lower to disable the device and 2.0 V or higher to enable it; this pin must not be left open."
},
{
"number": "2",
"name": "VIN",
"type": "power_in",
"description": "Power supply input for the internal circuit; connect this pin to the PVIN pins."
},
{
"number": "3",
"name": "PVIN",
"type": "power_in",
"description": "Power supply input for the switching regulator output stage; connect input ceramic capacitors (see page 33) between these pins and PGND."
},
{
"number": "4",
"name": "PVIN",
"type": "power_in",
"description": "Power supply input for the switching regulator output stage; connect input ceramic capacitors (see page 33) between these pins and PGND."
},
{
"number": "5",
"name": "N.C.",
"type": "unconnected",
"description": "Not connected to the chip; leave open, and confirm application behaviour if this pin is used and adjacent pins may be shorted."
},
{
"number": "6",
"name": "PGND",
"type": "power_in",
"description": "Ground pin for the output stage of the switching regulator."
},
{
"number": "7",
"name": "PGND",
"type": "power_in",
"description": "Ground pin for the output stage of the switching regulator."
},
{
"number": "8",
"name": "SW",
"type": "output",
"description": "Switching node connected to the internal high-side FET source and low-side FET drain; connect the power inductor and bootstrap capacitor here."
},
{
"number": "9",
"name": "SW",
"type": "output",
"description": "Switching node connected to the internal high-side FET source and low-side FET drain; connect the power inductor and bootstrap capacitor here."
},
{
"number": "10",
"name": "BST",
"type": "passive",
"description": "Connect a 0.1 µF (Typ) bootstrap capacitor between this pin and SW; the voltage across it is the high-side FET gate drive."
},
{
"number": "11",
"name": "OCP_SEL",
"type": "input",
"description": "Selects the average-inductor-current OCP threshold: 1.250 A (Typ) when connected to VREG (High) or 0.625 A (Typ) when connected to GND (Low)."
},
{
"number": "12",
"name": "MODE",
"type": "input",
"description": "Selects FPWM mode (set high), AUTO mode (set low or open), or SYNC mode (apply a clock to this pin)."
},
{
"number": "13",
"name": "SSCG",
"type": "input",
"description": "Spread spectrum select: connect to VREG (High) to enable spread spectrum or to GND (Low) to disable it."
},
{
"number": "14",
"name": "RESET",
"type": "output",
"description": "Open-drain reset output; connect a pull-up resistor to VREG or the supply within the RESET pin absolute maximum rating, with 5 kΩ to 100 kΩ recommended."
},
{
"number": "15",
"name": "GND",
"type": "power_in",
"description": "Ground pin."
},
{
"number": "16",
"name": "VOUT_DIS",
"type": "input",
"description": "Discharges the VOUT node when the discharge function is required (connect to VOUT); otherwise connect this pin to GND."
},
{
"number": "17",
"name": "VOUT_SNS",
"type": "input",
"description": "Inverting input of GmAmp1 used for OVP, SCP and RESET detection and for setting the GmAmp2 output clamp and phase compensation; connect to the output voltage."
},
{
"number": "18",
"name": "N.C.",
"type": "unconnected",
"description": "Not connected to the chip on this variant; leave open, and confirm application behaviour if this pin is used and adjacent pins may be shorted."
},
{
"number": "19",
"name": "VCC_EX",
"type": "power_in",
"description": "Power supply input for the internal circuit; VREG is supplied from this pin when between 3.2 V (VTEXH max) and 5.65 V (VEXOVPL min) is applied, and it should be connected to GND if unused."
},
{
"number": "20",
"name": "VREG",
"type": "power_out",
"description": "Outputs 3.3 V (Typ) for the internal circuit; connect a 1.0 µF (Typ) ceramic capacitor and do not add external loads other than OCP_SEL, MODE, SSCG and the RESET pull-up."
},
{
"number": "21",
"name": "EP",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The exposed pad (EXP-PAD) is listed on page 4 with no printed pin number ('-'), so it is omitted fro; Package naming differs: the hint says HTSSOP-20-EP, but the datasheet names the package HTSSOP-B20 (; Pins 17 and 18 differ by variant. This pinout uses the BD9P135/BD9P155 assignment (17 = VOUT_SNS, 18",
"exposed pad 21 added from the footprint"
],
"pages_sent": 13,
"cost_usd": 0.0697,
"at": "2026-10-30T22:52:58"
},
"datasheet": {
"url": "https://datasheet.lcsc.com/datasheet/pdf/705bc1aac3f4c1501284972a60bfdcd3.pdf",
"pages": 60,
"sha256": "f5977b9e0766c210",
"source_tier": "mfr"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 21,
"described": 21,
"cites_pages": true,
"refuses_to_fabricate": true
}
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