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Contents

README

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BD9E102FJ-GE2

ROHM SEMICONDUCTOR · Global Sourcing Parts · SOIC-8

BD9E102FJ-GE2 from ROHM SEMICONDUCTOR, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 BOOT passive Bootstrap pin: connect a 0.1 µF capacitor between this terminal and SW; its voltage is the gate drive voltage of the high-side MOSFET.
2 VIN power_in Power supply terminal for the switching regulator and control circuit (7.0V to 26V input); a 10 µF ceramic capacitor is recommended.
3 EN input Enable input: low level (0.8 V or lower) forces shutdown, high level (2.0 V or higher) enables the device; must be terminated.
4 AGND power_in Ground terminal for the control circuit.
5 FB input Inverting input node for the gm error amplifier, used with a resistor divider to set the output voltage.
6 COMP passive Input for the gm error amplifier output and output switch current comparator; connect frequency phase compensation components here.
7 PGND power_in Ground terminal for the output stage of the switching regulator.
8 SW output Switch node connected to the source of the high-side MOSFET and drain of the low-side MOSFET; connect a 0.1 µF bootstrap capacitor to BOOT and a 6.8 µH inductor.

Key specifications

Parameter Value
Manufacturer ROHM SEMICONDUCTOR
Package SOIC-8
Category Global Sourcing Parts
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Current in Operating Iopr 250 500 µA VFB = 0.9V 5
Supply Current in Standby Istby 0 10 µA VEN = 0V 5
Reference Voltage VFB 0.784 0.8 0.816 V 5
FB Input Current IFB -1 0 1 µA VFB = 0V 5
Switching frequency FOSC 484 570 656 kHz 5
Maximum Duty ratio Maxduty 88 93 98 % 5
Over Current limit ILIMIT 1.9 2.2 2.5 A 5
UVLO detection voltage VUVLO 6.1 6.4 6.7 V VIN falling 5
UVLO hysteresis voltage VUVLOHYS 100 200 300 mV 5
EN high-level input voltage VENH 2 V max printed as VIN 5
EN low-level input voltage VENL 0.8 V 5
EN Input current IEN 2 4 8 µA VEN = 3V 5
Soft Start time TSS 1.2 2.5 5 msec 5
High-side FET on-resistance RONH 250 mΩ ISW = 100mA 5
Low-side FET on-resistance RONL 200 mΩ ISW = 100mA 5
Supply Voltage VIN 7 26 V 5
Output Current IOUT 1 A 5
Output Voltage Range VRANGE 1 V max is VIN × 0.7 V 5
Supply Voltage VIN -0.3 30 V Ta = 25C 5
EN Input Voltage VEN -0.3 30 V Ta = 25C 5
Voltage from GND to BOOT VBOOT -0.3 35 V Ta = 25C 5
Voltage from SW to BOOT ⊿VBOOT -0.3 7 V Ta = 25C 5
FB Input Voltage VFB -0.3 7 V Ta = 25C 5
COMP Input Voltage VCOMP -0.3 7 V Ta = 25C 5
SW Input Voltage VSW -0.5 30 V Ta = 25C 5
Output Current IOUT 1 A Ta = 25C 5
Allowable Power Dissipation Pd 0.675 W 70 mm x 70 mm x 1.6 mm 1-layer glass epoxy board, derated by 5.4 mW/C for Ta ≥ 25C 5
Operating Ambient Temperature Range Topr -40 85 C 5
Storage Temperature Range Tstg -55 150 C 5
Thermal resistance junction to ambient θj-a 185.2 C/W SOP-J8, 1 layer board (back side copper foil area: 70mm×70mm) 24

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts copper  Provide the input capacitor as close to the IC VIN terminal as possible on the same plane as the IC.  If there is any unused area on the PCB, provide a copper foil plane for the ground node to assi 23

CAD (KiCad official)

  • Symbol: BD9E102FJ-GE2
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: bd9e102fj-ge2-etched.step / bd9e102fj-ge2-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); bd9e102fj-ge2.step / bd9e102fj-ge2.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: ROHM SEMICONDUCTOR datasheet (32 pp, sha256 c8767cc25b673053, retrieved 2026-10-26, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF