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Ray Publish 0.1.0 023e7d6 3h ago
{
  "slug": "bd9328efj-e2",
  "version": "0.1.0",
  "type": "component",
  "description": "ROHM Semicon DC-DC Converters, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "power management (pmic)",
    "bd9328efj-e2",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "bd9328efj-e2.kicad_sym",
    "bd9328efj-e2.kicad_mod",
    "bd9328efj-e2.glb",
    "bd9328efj-e2.step",
    "bd9328efj-e2.lbr",
    "docs/hero.png",
    "docs/bd9328efj-e2-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "bd9328efj-e2-hero.glb",
    "bd9328efj-e2-hero.overlay.json",
    "bd9328efj-e2-etched.glb"
  ],
  "component": {
    "mpn": "BD9328EFJ-E2",
    "manufacturer": "ROHM Semicon",
    "package": "SOIC-8",
    "pin_count": 8,
    "category": "Power Management (PMIC)",
    "subcategory": "DC-DC Converters",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590456474557181952",
    "parts": {
      "symbol": "bd9328efj-e2.kicad_sym",
      "footprint": "bd9328efj-e2.kicad_mod",
      "model_3d": "bd9328efj-e2-hero.glb",
      "model_3d_plain": "bd9328efj-e2-etched.glb",
      "model_3d_step": "bd9328efj-e2-etched.step",
      "model_3d_step_plain": "bd9328efj-e2.step",
      "lbr": "bd9328efj-e2.lbr"
    },
    "distributor_links": {
      "lcsc": "C5205502"
    },
    "distributor_check": {
      "checked_at": "2026-10-18T14:32:27Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "quota"
      },
      "mouser": {
        "pn": null,
        "status": "quota"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "BST",
        "type": "passive",
        "description": "High-side gate drive boost input, with a 0.1µF capacitor C_BS to SW and a 22Ω series resistor R_BS in the typical application; voltage limited to VSW+7V."
      },
      {
        "number": "2",
        "name": "VIN",
        "type": "power_in",
        "description": "Power input, operating range 4.2V to 18V (absolute maximum 20V)."
      },
      {
        "number": "3",
        "name": "SW",
        "type": "output",
        "description": "Power switching output between the integrated high-side and low-side FETs, rated -0.5V to +18V recommended and 20V absolute maximum."
      },
      {
        "number": "4",
        "name": "GND",
        "type": "power_in",
        "description": "Ground pin; the thermal pad is to be shorted to GND."
      },
      {
        "number": "5",
        "name": "FB",
        "type": "input",
        "description": "Feedback input to the error amplifier with a 0.9V (typ) feedback reference, set by the R_UP/R_DW divider."
      },
      {
        "number": "6",
        "name": "COMP",
        "type": "output",
        "description": "Error amplifier output compensation node (RC network to ground) that sets the switching duty cycle and is limited by the SS pin voltage at startup."
      },
      {
        "number": "7",
        "name": "EN",
        "type": "input",
        "description": "Enable input with a 1.2V (typ) threshold; leaving it open shuts down the IC, and EN fall time should be within 100µs, with a 20V maximum."
      },
      {
        "number": "8",
        "name": "SS",
        "type": "passive",
        "description": "Soft start control input; a 10µA (typ) source charges the external capacitor (0.1µF gives 22ms typical soft-start time)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-sonnet-5-5",
        "primary_mode": "text+vision",
        "consensus_model": "claude-opus-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The package is HTSOP-J8, not plain SOIC-8. It has an exposed thermal pad with no pin number. The dat; Types for BST, SW, COMP and SS are inferred from the block diagram and function text. The datasheet ",
          "vision extraction: provenance cannot be text-verified; needs consensus"
        ],
        "pages_sent": 22,
        "cost_usd": 0.2662,
        "at": "2026-10-18T14:32:13"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590456474557181952",
        "pages": 22,
        "sha256": "c2f4ee418f57eab6",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 8,
        "described": 8,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "bd9328efj-e2.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "bd9328efj-e2-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "4d4748d8c6bec117778e16de8e7ac44ed63a579f7b599f46482da66df8fc2018",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}