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README

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BD71847AMWV-E2

ROHM Semicon · DC-DC Converters · QFN-56-EP(7x7)

BD71847AMWV-E2 from ROHM Semicon, in a QFN-56-EP(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VIN_3P3 power_in Input supply from BUCK6 (3.3 V) for LDO3 and MUXSW.
2 WDOG_B input Watchdog input from the processor, referenced to DVDD.
3 RTC_RESET_B output Open-drain power OK signal for LDO1 and LDO2, referenced to DVDD and needing an external pull-up to DVDD.
4 LDO5_VOUT power_out LDO5 output (0.8 V to 3.3 V, 300 mA).
5 VSYS power_in Input supply from VSYS for LDO3 and LDO5.
6 LDO3_VOUT power_out LDO3 output (1.8 V to 3.3 V, 300 mA).
7 VIN_3P3 power_in Input supply from BUCK6 (3.3 V) for LDO3 and MUXSW.
8 LDO2_VOUT power_out LDO2 output (0.9 V or 0.8 V, 10 mA).
9 VSYS power_in Input supply from VSYS for LDO1 and LDO2.
10 LDO1_VOUT power_out LDO1 output (3.0 V to 3.3 V or 1.6 V to 1.9 V, 10 mA).
11 INTLDO1P5 power_out Output of the internal 1.5 V LDO that powers the PMIC; also supplies the crystal oscillator.
12 AGND power_in Analog ground, 0 V.
13 XOUT output 32.768 kHz crystal output.
14 XIN input 32.768 kHz crystal input.
15 PMIC_ON_REQ input Power on/off control input from the processor, referenced to VSYS.
16 PMIC_STBY_REQ input Standby request input from the processor, referenced to DVDD.
17 BUCK1_FB input BUCK1 feedback sense input.
18 BUCK1_VIN power_in BUCK1 switcher input supply from VSYS.
19 BUCK1_LX output BUCK1 switch node connection.
20 BUCK1_LX output BUCK1 switch node connection.
21 BUCK2_LX output BUCK2 switch node connection.
22 BUCK2_LX output BUCK2 switch node connection.
23 BUCK2_VIN power_in BUCK2 switcher input supply from VSYS.
24 BUCK2_FB input BUCK2 feedback sense input.
25 POR_B output Open-drain power-on reset output, referenced to DVDD and needing an external pull-up to DVDD.
26 SCL input I2C clock input, referenced to DVDD and needing an external pull-up to DVDD.
27 SDA bidirectional I2C data line, referenced to DVDD and needing an external pull-up to DVDD.
28 DVDD power_in Interface input supply for the digital I/O.
29 C32K_OUT output 32.768 kHz clock output, referenced to DVDD.
30 BUCK5_FB input BUCK5 feedback sense input.
31 BUCK5_VIN power_in BUCK5 switcher input supply from VSYS.
32 BUCK5_VIN power_in BUCK5 switcher input supply from VSYS.
33 BUCK5_LX output BUCK5 switch node connection.
34 BUCK5_LX output BUCK5 switch node connection.
35 BUCK8_LX output BUCK8 switch node connection.
36 BUCK8_LX output BUCK8 switch node connection.
37 BUCK8_VIN power_in BUCK8 switcher input supply from VSYS.
38 BUCK8_FB input BUCK8 feedback sense input.
39 IRQ_B output Open-drain interrupt output to the processor, referenced to DVDD and needing an external pull-up to DVDD.
40 PWRON_B input Power button input, referenced to VSYS; connect to VSYS when the power button function is not used.
41 VSYS power_in Input supply from VSYS for LDO4.
42 LDO4_VOUT power_out LDO4 output (0.9 V to 1.8 V, 250 mA).
43 VIN_1P8_1 power_in Input supply from BUCK7 (1.8 V) for LDO4 and LDO6.
44 LDO6_VOUT power_out LDO6 output (0.9 V to 1.8 V, 300 mA).
45 SD_VSELECT input Voltage select input for the SD load switch (MUXSW), referenced to DVDD; low selects 3.3 V and DVDD selects 1.8 V.
46 BUCK6_FB input BUCK6 feedback sense input.
47 BUCK6_VIN power_in BUCK6 switcher input supply from VSYS.
48 BUCK6_VIN power_in BUCK6 switcher input supply from VSYS.
49 BUCK6_LX output BUCK6 switch node connection.
50 BUCK6_LX output BUCK6 switch node connection.
51 BUCK7_LX output BUCK7 switch node connection.
52 BUCK7_LX output BUCK7 switch node connection.
53 BUCK7_VIN power_in BUCK7 switcher input supply from VSYS.
54 BUCK7_FB input BUCK7 feedback sense input.
55 MUXSW_VOUT power_out MUXSW (load switch) output, 3.3 V or 1.8 V with 500 mOhm max on-resistance.
56 VIN_1P8_2 power_in Input supply from BUCK7 (1.8 V) for MUXSW.
57 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer ROHM Semicon
Package QFN-56-EP(7x7)
Category Power Supply Chip
Pins 57

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Voltage range VSYS, BUCKx_VIN, VIN_1P8_x, VIN_3P3, PWRON_B, PMIC_ON_REQ VAMR_1 -0.3 6 V Ta=25 °C 17
Voltage range DVDD VAMR_2 -0.3 4.5 V Ta=25 °C 17
Voltage range INTLDO1P5 VAMR_3 -0.3 2.1 V Ta=25 °C 17
Voltage range BUCKx_LX VAMR_4 -1 7 V -1.0 (DC), -2.0 (10 ns) 17
Voltage range SCL, SDA, IRQ_B, POR_B, WDOG_B, RTC_RESET_B, PMIC_STBY_REQ, SD_VSELECT, C32K_OUT VAMR_5 -0.3 4.5 V Ta=25 °C 17
Voltage range BUCKx_FB, LDOx_VOUT, MUXSW_VOUT VAMR_6 -0.3 4.5 V Ta=25 °C 17
Voltage range XIN, XOUT VAMR_7 -0.3 2.1 V Ta=25 °C 17
Maximum junction temperature Tjmax 150 °C 17
Storage temperature range Tstg -55 150 °C 17
Thermal resistance junction to ambient θJA 76.8 °C/W 1s board, JESD51-3, still air 17
Junction to top characterization parameter ΨJT 6 °C/W 17
Supply voltage VSYS, BUCK1_VIN, BUCK2_VIN, BUCK5_VIN to BUCK8_VIN VOPR_1 2.7 5 5.5 V 18
Voltage range VIN_3P3 VOPR_2 2.7 3.3 3.6 V 18
Voltage range VIN_1P8_1 VOPR_3 1.71 1.8 5.5 V 18
Voltage range VIN_1P8_2 VOPR_4 1.71 1.8 1.89 V 18
Voltage range DVDD VOPR_5 1.71 1.8 3.6 V 18
Operating temperature Topr -40 25 105 °C 18
VSYS circuit current 1 IQ_VSYS1 14 23 μA READY State 18
VSYS circuit current 2 IQ_VSYS2 30 50 μA SNVS State 18
VSYS circuit current 3 IQ_VSYS3 126 195 μA SUSPEND State 18
VSYS circuit current 4 IQ_VSYS4 147 216 μA IDLE State 18
VSYS circuit current 5 IQ_VSYS5 147 216 μA Run State 18
DVDD circuit current 1 IQ_DVDD1 2 μA DVDD static current (OUT32K_EN=0) 18
DVDD circuit current 2 IQ_DVDD2 4 μA DVDD operation current (OUT32K_EN=1) 18
VSYS UVLO release voltage VUVLORL 2.65 3 3.35 V VSYS=Sweep up 19
VSYS UVLO detect voltage VUVLODT 2.65 2.7 2.75 V VSYS=Sweep down 19
VSYS UVLO hysteresis voltage VUVLOHYS 0.3 V 19
Detect temperature (thermal shutdown) TCTD 150 °C Die Temperature=Sweep up 19
COUT capacitor INTLDO1P5 CO_LDO15 0.5 1 5 μF 19
PWRON_B input H level VIH_PWRON 1.44 V 21
PWRON_B input L level VIL_PWRON 0.4 V 21
PMIC_ON_REQ input H level VIH_ONREQ 1.44 V 21
PMIC_ON_REQ input L level VIL_ONREQ 0.4 V 21
RTC_RESET_B output off leak current IOLK_RTCRESET -1 1 μA 22
POR_B output off leak current IOLK_POR -1 1 μA 22
IRQ_B output off leak current IOLK_IRQB -1 1 μA 67
SDA output L level voltage VOL_SDA 0.4 V IOL=6mA 63
SCL input hysteresis VIHYS_SCL 0.1 V 63
I2C clock frequency, fast mode fSCL 0 400 kHz Fast mode 64
BUCK1 output voltage VO_BK1 0.791 0.8 0.809 V Vo = 0.8 V, Io = 200 mA, PWM fix Mode 73
BUCK1 maximum output current IOMAX_BK1 3000 mA 73
BUCK1 over current protection IOCP_BK1 4500 mA Peak current of inductor 73
BUCK1 DC output voltage load regulation ΔVLDR_BK1 -1 0 1 % Io = 1 mA to Iomax, PWM fix Mode 73
BUCK1 output capacitance COBK1 22 44 100 μF Effective capacitance with BUCK's DC bias 73
BUCK2 output voltage VO_BK2 0.89 0.9 0.91 V Vo = 0.9 V, Io = 200 mA, PWM fix Mode 77
BUCK5 output voltage VO_BK5 0.89 0.9 0.91 V Vo = 0.9 V, Io = 200 mA, PWM fix Mode 81
BUCK6 output voltage VO_BK6 3.267 3.3 3.333 V Vo=3.3 V, Io = 200 mA, PWM fix Mode 84
BUCK7 output voltage VO_BK7 1.782 1.8 1.818 V Vo = 1.8 V, Io = 200 mA, PWM fix Mode 87

CAD (KiCad official)

  • Symbol: BD71847AMWV-E2
  • Footprint: Package_DFN_QFN:QFN-56-1EP_7x7mm_P0.4mm_EP4x4mm
  • 3D model: QFN-56-EP(7x7) (KiCad packages3D, STEP)
  • 3D model files: bd71847amwv-e2-etched.step / bd71847amwv-e2-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); bd71847amwv-e2.step / bd71847amwv-e2.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: ROHM Semicon datasheet (119 pp, sha256 393e3e23663c5173, retrieved 2026-10-22, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF