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BD54FA1FP3-ZTL
Public Made by Adomby adom
ROHM Semicon Linear Voltage Regulators (LDO), SOT-89-3. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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BD54FA1FP3-ZTL
ROHM Semicon · Linear Voltage Regulators (LDO) · SOT-89-3
BD54FA1FP3-ZTL from ROHM Semicon, in a SOT-89-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VO | power_out | Regulated 5.4V output pin (±1% accuracy, up to 0.1A) that needs a ceramic output capacitor of at least 0.3µF to GND for stability. |
| 2 | GND | power_in | Ground pin, which must be the lowest voltage of all pins; the reverse-side FIN is connected to this pin. |
| 3 | VCC | power_in | Input supply pin, recommended range Vo+3.0V to 25.0V (absolute maximum -0.3 to +30.0V), with an input capacitor placed close to the pin. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | ROHM Semicon |
| Package | SOT-89-3 |
| Category | Power Supply Chip |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Bias current | ICC | 300 | 450 | μA | IO=0A, Vo=5.4V, Vcc=Vo+5V, Ta=25°C | 3 | |
| Line regulation | Reg.I | -1 | 0.5 | 1 | % | VCC=(Vo+3V)→25.0V | 3 |
| Load regulation | Reg IO | -1.5 | 0.5 | 1.5 | % | IO=0→0.1A | 3 |
| Minimum dropout voltage | VCO | 1 | 3 | V | IO=0.1A | 3 | |
| Output voltage | VO | 5.4 | V | IO=0A; limits Vo×0.99 to Vo×1.01 (±1%) | 3 | ||
| Power supply voltage | VCC | -0.3 | 30 | V | Ta=25°C; not to exceed Pd | 3 | |
| Output voltage | Vo | -0.3 | 18 | V | Ta=25°C | 3 | |
| Power dissipation SOT89-3K | Pd | 1.67 | W | Ta=25°C, 4-layer JEDEC board; derate 13.4mW/°C above 25°C | 3 | ||
| Operating temperature range | Ta | -25 | 85 | °C | Ta=25°C | 3 | |
| Storage temperature range | Tstg | -55 | 150 | °C | 3 | ||
| Maximum junction temperature | Tjmax | 150 | °C | 3 | |||
| Output current | IO | 0 | 0.1 | A | 3 | ||
| Output capacitor | COUT | 0.3 | 1 | μF | Ceramic capacitor recommended; min must be met over temperature, DC bias | 3 | |
| Thermal resistance junction-ambient | θj-a | 74.8 | °C/W | SOT89-3K, JEDEC 4-layer PCB 114.3mm×76.2mm×1.6mm | 8 | ||
| TSD ON temperature | 173 | °C | 11 | ||||
| TSD hysteresis temperature | 8 | °C | 11 |
CAD (KiCad official)
- Symbol:
BD54FA1FP3-ZTL - Footprint:
Package_TO_SOT_SMD:SOT-89-3 - 3D model: SOT-89-3 (KiCad packages3D, STEP)
- 3D model files:
bd54fa1fp3-ztl-etched.step/bd54fa1fp3-ztl-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);bd54fa1fp3-ztl.step/bd54fa1fp3-ztl.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: ROHM Semicon datasheet (17 pp, sha256
cd3a9ca9368f7f94, retrieved 2026-10-23, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# BD54FA1FP3-ZTL
**ROHM Semicon** · Linear Voltage Regulators (LDO) · SOT-89-3
BD54FA1FP3-ZTL from ROHM Semicon, in a SOT-89-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VO | power_out | Regulated 5.4V output pin (±1% accuracy, up to 0.1A) that needs a ceramic output capacitor of at least 0.3µF to GND for stability. |
| 2 | GND | power_in | Ground pin, which must be the lowest voltage of all pins; the reverse-side FIN is connected to this pin. |
| 3 | VCC | power_in | Input supply pin, recommended range Vo+3.0V to 25.0V (absolute maximum -0.3 to +30.0V), with an input capacitor placed close to the pin. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | ROHM Semicon |
| Package | SOT-89-3 |
| Category | Power Supply Chip |
| Pins | 3 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Bias current | ICC | | 300 | 450 | μA | IO=0A, Vo=5.4V, Vcc=Vo+5V, Ta=25°C | 3 |
| Line regulation | Reg.I | -1 | 0.5 | 1 | % | VCC=(Vo+3V)→25.0V | 3 |
| Load regulation | Reg IO | -1.5 | 0.5 | 1.5 | % | IO=0→0.1A | 3 |
| Minimum dropout voltage | VCO | | 1 | 3 | V | IO=0.1A | 3 |
| Output voltage | VO | | 5.4 | | V | IO=0A; limits Vo×0.99 to Vo×1.01 (±1%) | 3 |
| Power supply voltage | VCC | -0.3 | | 30 | V | Ta=25°C; not to exceed Pd | 3 |
| Output voltage | Vo | -0.3 | | 18 | V | Ta=25°C | 3 |
| Power dissipation SOT89-3K | Pd | | | 1.67 | W | Ta=25°C, 4-layer JEDEC board; derate 13.4mW/°C above 25°C | 3 |
| Operating temperature range | Ta | -25 | | 85 | °C | Ta=25°C | 3 |
| Storage temperature range | Tstg | -55 | | 150 | °C | | 3 |
| Maximum junction temperature | Tjmax | | | 150 | °C | | 3 |
| Output current | IO | 0 | | 0.1 | A | | 3 |
| Output capacitor | COUT | 0.3 | 1 | | μF | Ceramic capacitor recommended; min must be met over temperature, DC bias | 3 |
| Thermal resistance junction-ambient | θj-a | | 74.8 | | °C/W | SOT89-3K, JEDEC 4-layer PCB 114.3mm×76.2mm×1.6mm | 8 |
| TSD ON temperature | | | 173 | | °C | | 11 |
| TSD hysteresis temperature | | | 8 | | °C | | 11 |
## CAD (KiCad official)
- Symbol: `BD54FA1FP3-ZTL`
- Footprint: `Package_TO_SOT_SMD:SOT-89-3`
- 3D model: SOT-89-3 (KiCad packages3D, STEP)
- 3D model files: `bd54fa1fp3-ztl-etched.step` / `bd54fa1fp3-ztl-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `bd54fa1fp3-ztl.step` / `bd54fa1fp3-ztl.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [ROHM Semicon datasheet](docs/bd54fa1fp3-ztl-datasheet.pdf) (17 pp, sha256 `cd3a9ca9368f7f94`, retrieved 2026-10-23, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/bd54fa1fp3-ztl-datasheet.pdf)