component
BD00KA5WF-E2
Public Made by Adomby adom
ROHM Semicon Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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BD00KA5WF-E2
ROHM Semicon · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOP-8
BD00KA5WF-E2 from ROHM Semicon, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT | power_out | Regulated voltage output; requires an anti-oscillation capacitor (1μF recommended, low-ESR ceramic) to GND, and delivers up to 500mA. |
| 2 | ADJ | input | Output voltage configuration terminal; set VOUT = VADJ × (R1+R2) ÷ R1 with VADJ = 0.75V typ. and about 30kΩ recommended for R1. |
| 3 | N.C. | unconnected | Unconnected terminal, electrically open to the inside of the IC chip. |
| 4 | N.C. | unconnected | Unconnected terminal, electrically open to the inside of the IC chip. |
| 5 | CTL | input | Output voltage ON/OFF control; ON at 2.0V and higher, OFF at 0.8V and lower, with a maximum of Vcc. |
| 6 | GND | power_in | Ground; keep at the same potential as the set ground, using wide ground patterns. |
| 7 | GND | power_in | Ground; keep at the same potential as the set ground, using wide ground patterns. |
| 8 | Vcc | power_in | Power supply voltage input, 2.3V to 5.5V recommended operating range (absolute maximum 7.0V), with a bypass capacitor of 1μF or greater to GND. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | ROHM Semicon |
| Package | SOP-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Power Supply Voltage (recommended) | Vcc | 2.3 | 5.5 | V | 4 | ||
| Output Current (recommended) | Io | 0 | 500 | mA | 4 | ||
| Output Voltage Configuration Range | Vo | 1 | 4 | V | Footnote *5: only BD00KA5WFP and BD00KA5WF | 4 | |
| Power Supply Voltage (absolute maximum) | Vcc | -0.3 | 7 | V | Footnote *1: must not exceed Pd | 4 | |
| Output Control Terminal Voltage (absolute maximum) | VCTL | -0.3 | V | Printed upper limit is Vcc (footnote *1: must not exceed Pd) | 4 | ||
| Power Dissipation SOP8 | Pd | 687.6 | mW | Ta=25℃; 70mm×70mm×1.6mm glass epoxy board; reduce 5.5 mW/℃ over 25℃ | 4 | ||
| Operating Temperature Range | Topr | -40 | 105 | ℃ | 4 | ||
| Ambient Storage Temperature | Tstg | -55 | 150 | ℃ | 4 | ||
| Maximum Junction Temperature | Tjmax | 150 | ℃ | 4 | |||
| Reference Voltage | VADJ | 0.742 | 0.75 | 0.758 | V | Io=50mA | 5 |
| Peak Output Current | Io | 500 | mA | 5 | |||
| CTL ON Mode Voltage | VCTLON | 2 | V | ACTIVE MODE, Io=0mA | 5 | ||
| CTL OFF Mode Voltage | VCTLOFF | 0.8 | V | OFF MODE, Io=0mA | 5 | ||
| Dropout Voltage | ΔVd | 0.12 | 0.2 | V | Io=200mA, Vcc=0.95×Vo | 5 | |
| Line Regulation | Reg.I | 10 | 35 | mV | Vcc=Vo+0.5V→5.5V, Io=200mA | 5 | |
| Load Regulation | Reg.L | 25 | 75 | mV | Io=0mA→500mA | 5 | |
| Shut Down Current | Isd | 0 | 1 | μA | VCTL=0V, Io=0mA (OFFmode) | 5 | |
| Bias Current | Ib | 350 | 550 | μA | Io=0mA | 5 | |
| CTL Input Current | ICTL | 20 | 40 | 60 | μA | Io=0mA | 5 |
| Temperature Coefficient of Output Voltage | Tcvo | -100 | 100 | ppm/℃ | Io=5mA,Tj=0 to 125℃; printed ±100, not 100% tested | 5 | |
| Thermal resistance junction-to-case (standard board) | θj-c | 181.8 | ℃/W | Printed as '(1) When using a standard board' | 9 | ||
| Thermal resistance junction-to-ambient (IC alone) | θj-a | 222.2 | ℃/W | Printed as '(2) When using an IC alone' | 9 |
CAD (KiCad official)
- Symbol:
BD00KA5WF-E2 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
bd00ka5wf-e2-etched.step/bd00ka5wf-e2-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);bd00ka5wf-e2.step/bd00ka5wf-e2.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: ROHM Semicon datasheet (19 pp, sha256
7360a8c5edfc1149, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# BD00KA5WF-E2
**ROHM Semicon** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOP-8
BD00KA5WF-E2 from ROHM Semicon, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT | power_out | Regulated voltage output; requires an anti-oscillation capacitor (1μF recommended, low-ESR ceramic) to GND, and delivers up to 500mA. |
| 2 | ADJ | input | Output voltage configuration terminal; set VOUT = VADJ × (R1+R2) ÷ R1 with VADJ = 0.75V typ. and about 30kΩ recommended for R1. |
| 3 | N.C. | unconnected | Unconnected terminal, electrically open to the inside of the IC chip. |
| 4 | N.C. | unconnected | Unconnected terminal, electrically open to the inside of the IC chip. |
| 5 | CTL | input | Output voltage ON/OFF control; ON at 2.0V and higher, OFF at 0.8V and lower, with a maximum of Vcc. |
| 6 | GND | power_in | Ground; keep at the same potential as the set ground, using wide ground patterns. |
| 7 | GND | power_in | Ground; keep at the same potential as the set ground, using wide ground patterns. |
| 8 | Vcc | power_in | Power supply voltage input, 2.3V to 5.5V recommended operating range (absolute maximum 7.0V), with a bypass capacitor of 1μF or greater to GND. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | ROHM Semicon |
| Package | SOP-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Power Supply Voltage (recommended) | Vcc | 2.3 | | 5.5 | V | | 4 |
| Output Current (recommended) | Io | 0 | | 500 | mA | | 4 |
| Output Voltage Configuration Range | Vo | 1 | | 4 | V | Footnote *5: only BD00KA5WFP and BD00KA5WF | 4 |
| Power Supply Voltage (absolute maximum) | Vcc | -0.3 | | 7 | V | Footnote *1: must not exceed Pd | 4 |
| Output Control Terminal Voltage (absolute maximum) | VCTL | -0.3 | | | V | Printed upper limit is Vcc (footnote *1: must not exceed Pd) | 4 |
| Power Dissipation SOP8 | Pd | | | 687.6 | mW | Ta=25℃; 70mm×70mm×1.6mm glass epoxy board; reduce 5.5 mW/℃ over 25℃ | 4 |
| Operating Temperature Range | Topr | -40 | | 105 | ℃ | | 4 |
| Ambient Storage Temperature | Tstg | -55 | | 150 | ℃ | | 4 |
| Maximum Junction Temperature | Tjmax | | | 150 | ℃ | | 4 |
| Reference Voltage | VADJ | 0.742 | 0.75 | 0.758 | V | Io=50mA | 5 |
| Peak Output Current | Io | 500 | | | mA | | 5 |
| CTL ON Mode Voltage | VCTLON | 2 | | | V | ACTIVE MODE, Io=0mA | 5 |
| CTL OFF Mode Voltage | VCTLOFF | | | 0.8 | V | OFF MODE, Io=0mA | 5 |
| Dropout Voltage | ΔVd | | 0.12 | 0.2 | V | Io=200mA, Vcc=0.95×Vo | 5 |
| Line Regulation | Reg.I | | 10 | 35 | mV | Vcc=Vo+0.5V→5.5V, Io=200mA | 5 |
| Load Regulation | Reg.L | | 25 | 75 | mV | Io=0mA→500mA | 5 |
| Shut Down Current | Isd | | 0 | 1 | μA | VCTL=0V, Io=0mA (OFFmode) | 5 |
| Bias Current | Ib | | 350 | 550 | μA | Io=0mA | 5 |
| CTL Input Current | ICTL | 20 | 40 | 60 | μA | Io=0mA | 5 |
| Temperature Coefficient of Output Voltage | Tcvo | -100 | | 100 | ppm/℃ | Io=5mA,Tj=0 to 125℃; printed ±100, not 100% tested | 5 |
| Thermal resistance junction-to-case (standard board) | θj-c | | 181.8 | | ℃/W | Printed as '(1) When using a standard board' | 9 |
| Thermal resistance junction-to-ambient (IC alone) | θj-a | | 222.2 | | ℃/W | Printed as '(2) When using an IC alone' | 9 |
## CAD (KiCad official)
- Symbol: `BD00KA5WF-E2`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `bd00ka5wf-e2-etched.step` / `bd00ka5wf-e2-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `bd00ka5wf-e2.step` / `bd00ka5wf-e2.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [ROHM Semicon datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586198815582138368) (19 pp, sha256 `7360a8c5edfc1149`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/bd00ka5wf-e2-datasheet.pdf)