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BC857CDW1T1G
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onsemi Bipolar (BJT), SOT-363. Pinout reviewed by a person against the datasheet, KiCad symbol/footprint/3D.
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BC857CDW1T1G
onsemi · Bipolar (BJT) · SOT-363
BC857CDW1T1G from onsemi, in a SOT-363. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | EMITTER 2 | passive | Emitter terminal of the second PNP transistor (Q2) in the dual device; the datasheet gives no pin-specific limit, so use the device maximum ratings (VCEO, VCBO, VEBO, IC). |
| 2 | BASE 2 | passive | Base terminal of the second PNP transistor (Q2) in the dual device; the datasheet gives no pin-specific limit, so use the device maximum ratings (VCEO, VCBO, VEBO, IC). |
| 3 | COLLECTOR 1 | passive | Collector terminal of the first PNP transistor (Q1) in the dual device; the datasheet gives no pin-specific limit, so use the device maximum ratings (VCEO, VCBO, VEBO, IC). |
| 4 | EMITTER 1 | passive | Emitter terminal of the first PNP transistor (Q1) in the dual device; the datasheet gives no pin-specific limit, so use the device maximum ratings (VCEO, VCBO, VEBO, IC). |
| 5 | BASE 1 | passive | Base terminal of the first PNP transistor (Q1) in the dual device; the datasheet gives no pin-specific limit, so use the device maximum ratings (VCEO, VCBO, VEBO, IC). |
| 6 | COLLECTOR 2 | passive | Collector terminal of the second PNP transistor (Q2) in the dual device; the datasheet gives no pin-specific limit, so use the device maximum ratings (VCEO, VCBO, VEBO, IC). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOT-363 |
| Category | Transistors/Thyristors |
| Pins | 6 |
CAD (KiCad official)
- Symbol:
BC857CDW1T1G - Footprint:
Package_TO_SOT_SMD:SOT-363_SC-70-6 - 3D model: SOT-363 (KiCad packages3D, STEP)
- 3D model files:
bc857cdw1t1g-etched.step/bc857cdw1t1g-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);bc857cdw1t1g.step/bc857cdw1t1g.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (7 pp, sha256
3a5f33908380e4f2, retrieved 2026-10-22, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# BC857CDW1T1G
**onsemi** · Bipolar (BJT) · SOT-363
BC857CDW1T1G from onsemi, in a SOT-363. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | EMITTER 2 | passive | Emitter terminal of the second PNP transistor (Q2) in the dual device; the datasheet gives no pin-specific limit, so use the device maximum ratings (VCEO, VCBO, VEBO, IC). |
| 2 | BASE 2 | passive | Base terminal of the second PNP transistor (Q2) in the dual device; the datasheet gives no pin-specific limit, so use the device maximum ratings (VCEO, VCBO, VEBO, IC). |
| 3 | COLLECTOR 1 | passive | Collector terminal of the first PNP transistor (Q1) in the dual device; the datasheet gives no pin-specific limit, so use the device maximum ratings (VCEO, VCBO, VEBO, IC). |
| 4 | EMITTER 1 | passive | Emitter terminal of the first PNP transistor (Q1) in the dual device; the datasheet gives no pin-specific limit, so use the device maximum ratings (VCEO, VCBO, VEBO, IC). |
| 5 | BASE 1 | passive | Base terminal of the first PNP transistor (Q1) in the dual device; the datasheet gives no pin-specific limit, so use the device maximum ratings (VCEO, VCBO, VEBO, IC). |
| 6 | COLLECTOR 2 | passive | Collector terminal of the second PNP transistor (Q2) in the dual device; the datasheet gives no pin-specific limit, so use the device maximum ratings (VCEO, VCBO, VEBO, IC). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOT-363 |
| Category | Transistors/Thyristors |
| Pins | 6 |
## CAD (KiCad official)
- Symbol: `BC857CDW1T1G`
- Footprint: `Package_TO_SOT_SMD:SOT-363_SC-70-6`
- 3D model: SOT-363 (KiCad packages3D, STEP)
- 3D model files: `bc857cdw1t1g-etched.step` / `bc857cdw1t1g-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `bc857cdw1t1g.step` / `bc857cdw1t1g.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [onsemi datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588947920192212992) (7 pp, sha256 `3a5f33908380e4f2`, retrieved 2026-10-22, tier: lcsc)
- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/bc857cdw1t1g-datasheet.pdf)