# BC850C

**Nexperia** · Bipolar (BJT) · SOT-23

BC850C from Nexperia, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | base | input | Base terminal of the NPN transistor; the datasheet gives the device limits of VEBO −5 V and IBM peak base current −200 mA for the part. |
| 2 | emitter | passive | Emitter terminal of the NPN transistor; the device limits are IC collector current (DC) −100 mA and ICM peak collector current −200 mA, with VEBO −5 V. |
| 3 | collector | passive | Collector terminal of the NPN transistor; for the BC850 the datasheet gives VCBO −50 V and VCEO −45 V, with IC collector current (DC) −100 mA. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | SOT-23 |
| Category | Transistors/Thyristors |
| Pins | 3 |

## CAD (KiCad official)

- Symbol: `BC850C`
- Footprint: `Package_TO_SOT_SMD:SOT-23`
- 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files: `bc850c-etched.step` / `bc850c-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `bc850c.step` / `bc850c.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Nexperia datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588917880725782528) (9 pp, sha256 `5a54f49bd041f6c5`, retrieved 2026-10-09, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/bc850c-datasheet.pdf)