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BC846S
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Changjing Bipolar (BJT), SOT-363. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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BC846S
Changjing · Bipolar (BJT) · SOT-363
BC846S from Changjing, in a SOT-363. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | E1 | passive | Emitter of transistor 1 (NPN); VEBO max 6 V, IC max 0.1 A per transistor. |
| 2 | B1 | passive | Base of transistor 1; VEBO max 6 V, hFE 200 to 450 at VCE=5V, IC=2mA. |
| 3 | C2 | passive | Collector of transistor 2; VCEO max 65 V, VCBO max 80 V, IC max 0.1 A. |
| 4 | E2 | passive | Emitter of transistor 2 (NPN); VEBO max 6 V, IC max 0.1 A per transistor. |
| 5 | B2 | passive | Base of transistor 2; VEBO max 6 V, hFE 200 to 450 at VCE=5V, IC=2mA. |
| 6 | C1 | passive | Collector of transistor 1; VCEO max 65 V, VCBO max 80 V, IC max 0.1 A. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Changjing |
| Package | SOT-363 |
| Category | Transistors/Thyristors |
| Pins | 6 |
CAD (KiCad official)
- Symbol:
BC846S - Footprint:
Package_TO_SOT_SMD:SOT-363_SC-70-6 - 3D model: SOT-363 (KiCad packages3D, STEP)
- 3D model files:
bc846s-etched.step/bc846s-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);bc846s.step/bc846s.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Changjing datasheet (4 pp, sha256
163a9f442cc846a2, retrieved 2026-10-10, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# BC846S
**Changjing** · Bipolar (BJT) · SOT-363
BC846S from Changjing, in a SOT-363. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | E1 | passive | Emitter of transistor 1 (NPN); VEBO max 6 V, IC max 0.1 A per transistor. |
| 2 | B1 | passive | Base of transistor 1; VEBO max 6 V, hFE 200 to 450 at VCE=5V, IC=2mA. |
| 3 | C2 | passive | Collector of transistor 2; VCEO max 65 V, VCBO max 80 V, IC max 0.1 A. |
| 4 | E2 | passive | Emitter of transistor 2 (NPN); VEBO max 6 V, IC max 0.1 A per transistor. |
| 5 | B2 | passive | Base of transistor 2; VEBO max 6 V, hFE 200 to 450 at VCE=5V, IC=2mA. |
| 6 | C1 | passive | Collector of transistor 1; VCEO max 65 V, VCBO max 80 V, IC max 0.1 A. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Changjing |
| Package | SOT-363 |
| Category | Transistors/Thyristors |
| Pins | 6 |
## CAD (KiCad official)
- Symbol: `BC846S`
- Footprint: `Package_TO_SOT_SMD:SOT-363_SC-70-6`
- 3D model: SOT-363 (KiCad packages3D, STEP)
- 3D model files: `bc846s-etched.step` / `bc846s-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `bc846s.step` / `bc846s.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Changjing datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588954556931706880) (4 pp, sha256 `163a9f442cc846a2`, retrieved 2026-10-10, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/bc846s-datasheet.pdf)