component
AZ1117CR2-ADJTRG1
Public Made by Adomby adom
Diodes Incorporated Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-89. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Made with KiCad 10.0 · needs KiCad 10.0 or later to open · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 13d ago |
| viewers | 13d ago |
| az1117cr2-adjtrg1-etched.glb | 13d ago |
| az1117cr2-adjtrg1-etched.step | 13d ago |
| az1117cr2-adjtrg1-hero.glb | 13d ago |
| az1117cr2-adjtrg1-hero.overlay.json | 13d ago |
| az1117cr2-adjtrg1.glb | 13d ago |
| az1117cr2-adjtrg1.kicad_mod | 13d ago |
| az1117cr2-adjtrg1.kicad_sym | 13d ago |
| az1117cr2-adjtrg1.lbr | 13d ago |
| az1117cr2-adjtrg1.step | 13d ago |
| package.json | 13d ago |
| page.json | 13d ago |
| README.md | 13d ago |
AZ1117CR2-ADJTRG1
Diodes Incorporated · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-89
AZ1117CR2-ADJTRG1 from Diodes Incorporated, in a SOT-89. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | ADJ/GND | input | Adjust pin: sets the output voltage through the external divider on the ADJ version, with adjust pin current specified at 60 µA typ and 120 µA max. On the fixed versions this pin is the ground reference. |
| 2 | INPUT | power_in | Unregulated supply input; the absolute maximum input voltage is 18 V and the recommended maximum is 15 V. |
| 3 | OUTPUT | power_out | Regulated output; a minimum of 10 µF output capacitor is required, with ESR below 20 Ω. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOT-89 |
| Category | Power Management (PMIC) |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Reference Voltage (boldface row, -20 to +125°C) | VREF | 1.225 | 1.25 | 1.27 | V | 1.5V ≤ VIN-VOUT ≤ 10V | 4 |
| Reference Voltage (TJ = +25°C row) | VREF | 1.238 | 1.25 | 1.262 | V | 1.5V ≤ VIN-VOUT ≤ 10V | 4 |
| Line Regulation (TJ = +25°C row) | VRLINE | 0.001 | 0.1 | % | 1.5V ≤ VIN-VOUT ≤ 10V | 4 | |
| Line Regulation (boldface row, -20 to +125°C) | VRLINE | 0.2 | % | 1.5V ≤ VIN-VOUT ≤ 10V | 4 | ||
| Load Regulation | VRLOAD | 0.4 | 1 | % | 4 | ||
| Current Limit | ILIMIT | 1 | 1.35 | A | 4 | ||
| Adjust Pin Current | 60 | 120 | µA | 4 | |||
| Adjust Pin Current Change | 0.2 | 5 | µA | 1.5 ≤ (VIN-VOUT) ≤ 10V | 4 | ||
| Minimum Load Current | 1.7 | 5 | mA | 1.5 ≤ (VIN-VOUT) ≤ 10V | 4 | ||
| Ripple Rejection (PSRR) | PSRR | 70 | dB | f = 120Hz, COUT = 22µF (VIN-VOUT) = 3V, IOUT = 300mA | 4 | ||
| Temperature Stability | 0.5 | % | 4 | ||||
| RMS Output Noise (% of VOUT) | 0.003 | % | TA = +25°C, 10Hz ≤ f ≤ 10kHz | 4 | |||
| Thermal Shutdown Junction Temperature | 160 | °C | 4 | ||||
| Thermal Shutdown Hysteresis | 16 | °C | 4 | ||||
| Thermal Resistance Junction to Case, SOT89 | θJC | 30 | °C/W | Junction to case, SOT89 | 4 | ||
| Input Voltage (absolute maximum) | VIN | 18 | V | 4 | |||
| Operating Junction Temperature Range (absolute maximum) | TJ | 150 | °C | 4 | |||
| Storage Temperature Range | TSTG | -65 | 150 | °C | 4 | ||
| ESD (Human Body Model) | 4000 | V | Human Body Model | 4 | |||
| Thermal Resistance Junction to Ambient, without heatsink, SOT89 | θJA | 170 | °C/W | Without heatsink, SOT89 | 4 | ||
| Thermal Resistance Junction to Ambient, with heatsink, SOT89 | θJA | 150 | °C/W | With heatsink (Note 6), SOT89 | 4 | ||
| Input Voltage (recommended operating) | VIN | 15 | V | 4 | |||
| Operating Junction Temperature Range (recommended operating) | TJ | -20 | 125 | °C | 4 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | Abs | , ESD (Human Body Model) 4000 V Notes: 5. Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and | 4 | |
| contacts | tin | Terminals: Finish, Matte Tin Plated Leads, Solderable per MIL-STD-202, Method 208 Weight: | 23 |
CAD (KiCad official)
- Symbol:
AZ1117CR2-ADJTRG1 - Footprint:
Package_TO_SOT_SMD:SOT-89-3 - 3D model: SOT-89 (KiCad packages3D, STEP)
- 3D model files:
az1117cr2-adjtrg1-etched.step/az1117cr2-adjtrg1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);az1117cr2-adjtrg1.step/az1117cr2-adjtrg1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Diodes Incorporated datasheet (24 pp, sha256
8333717aa7b5f90f, retrieved 2026-10-21, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).