component
AZ1117CR2-3.3TRG1
Public Made by Adomby adom
Diodes Incorporated Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-89. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Made with KiCad 10.0 · needs KiCad 10.0 or later to open · KiCad file format 20260206
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| az1117cr2-3-3trg1-etched.step | 17d ago |
| az1117cr2-3-3trg1-hero.glb | 17d ago |
| az1117cr2-3-3trg1-hero.overlay.json | 17d ago |
| az1117cr2-3-3trg1.glb | 17d ago |
| az1117cr2-3-3trg1.kicad_mod | 17d ago |
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| package.json | 17d ago |
| page.json | 17d ago |
| README.md | 17d ago |
AZ1117CR2-3.3TRG1
Diodes Incorporated · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-89
AZ1117CR2-3.3TRG1 from Diodes Incorporated, in a SOT-89. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | ADJ/GND | power_in | Ground reference pin for the fixed 3.3V version; in the ADJ version this pin is the adjust input, whose pin current is 60µA typical and 120µA maximum. |
| 2 | INPUT | power_in | Unregulated supply input, with input voltage limited to 15V maximum in recommended operating conditions and 18V absolute maximum. |
| 3 | OUTPUT | power_out | Regulated 3.3V output, specified at 3.267V to 3.333V over 1.5V ≤ VIN-VOUT ≤ 10V, with a current limit of 1.35A typical (1A minimum) and a minimum load current of 1.7mA typical; a minimum 10µF output capacitor is required. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOT-89 |
| Category | Power Management (PMIC) |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output Voltage | VOUT | 3.267 | 3.3 | 3.333 | V | 1.5V ≤ VIN-VOUT ≤ 10V | 7 |
| Output Voltage (boldface, full junction temperature range) | VOUT | 3.235 | 3.3 | 3.365 | V | 1.5V ≤ VIN-VOUT ≤ 10V; TJ = -20°C to +125°C (boldface limits) | 7 |
| Line Regulation | VRLINE | 0.5 | 6 | mV | 1.5V ≤ VIN-VOUT ≤ 10V | 7 | |
| Line Regulation (boldface, full junction temperature range) | VRLINE | 10 | mV | 1.5V ≤ VIN-VOUT ≤ 10V; TJ = -20°C to +125°C (boldface limits) | 7 | ||
| Load Regulation | VRLOAD | 2 | mV | 7 | |||
| Load Regulation (boldface, full junction temperature range) | VRLOAD | 15 | mV | TJ = -20°C to +125°C (boldface limits) | 7 | ||
| Current Limit | ILIMIT | 1 | 1.35 | A | 7 | ||
| Quiescent Current | IQ | 4 | 6 | mA | IOUT = 0 | 7 | |
| Ripple Rejection (PSRR) | PSRR | 70 | dB | f = 120Hz, COUT = 22µF, (VIN-VOUT) = 3V, IOUT = 300mA | 7 | ||
| Temperature Stability | 0.5 | % | 7 | ||||
| RMS Output Noise (% of VOUT) | 0.003 | % | TA = +25ºC, 10Hz ≤ f ≤ 10kHz | 7 | |||
| Thermal Shutdown Junction Temperature | 160 | °C | 7 | ||||
| Thermal Shutdown Hysteresis | 16 | °C | 7 | ||||
| Thermal Resistance (Junction to Case), SOT89 | θJC | 30 | °C/W | 7 | |||
| Input Voltage (absolute maximum) | VIN | 18 | V | 4 | |||
| Operating Junction Temperature Range (absolute maximum rating) | TJ | 150 | °C | 4 | |||
| Storage Temperature Range | TSTG | -65 | 150 | °C | 4 | ||
| Lead Temperature (Soldering, 10 sec) | TLEAD | 260 | °C | Soldering, 10 sec | 4 | ||
| ESD (Human Body Model) | 4000 | V | Human Body Model | 4 | |||
| Thermal Resistance (Junction to Ambient, Without Heatsink), SOT89 | θJA | 170 | °C/W | Without heatsink | 4 | ||
| Thermal Resistance (Junction to Ambient, With Heatsink), SOT89 | θJA | 150 | °C/W | With heatsink (Note 6: chip soldered to 100mm² copper on 2oz 2-layer FR-4) | 4 | ||
| Input Voltage (recommended operating) | VIN | 15 | V | 4 | |||
| Operating Junction Temperature Range (recommended operating) | TJ | -20 | 125 | °C | 4 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | Abs | , ESD (Human Body Model) 4000 V Notes: 5. Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and | 4 | |
| contacts | tin | Terminals: Finish, Matte Tin Plated Leads, Solderable per MIL-STD-202, Method 208 Weight: | 23 |
CAD (KiCad official)
- Symbol:
AZ1117CR2-3.3TRG1 - Footprint:
Package_TO_SOT_SMD:SOT-89-3 - 3D model: SOT-89 (KiCad packages3D, STEP)
- 3D model files:
az1117cr2-3-3trg1-etched.step/az1117cr2-3-3trg1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);az1117cr2-3-3trg1.step/az1117cr2-3-3trg1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Diodes Incorporated datasheet (24 pp, sha256
8333717aa7b5f90f, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).