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pin map: the package TAB (symbol pin 4, VOUT) is pad 2, not a fourth pad - the footprint name says so. Without the map the connect dangled and the library failed validate, which also blocked the orderable attributes (LCSC_PN C460428). Now emitted.

Ray ·1067d86beb · ·parent a46ae8b
2 files changed +39−22
az1117cr-3-3trg1.lbr+36−22
@@ -50,13 +50,19 @@ <layer number="98" name="Guide" color="6" fill="1" visible="yes" active="yes"/> </layers> <library>-<description>SOT-89-3 (symbol synthesized from footprint pads)</description>+<description></description> <packages>-<package name="SOT-89-3">-  <description>SOT-89-3</description>+<package name="AZ1117CR-3.3TRG1">+  <description>AZ1117CR-3.3TRG1</description>   <smd name="1" x="-1.9500" y="1.5000" dx="1.3000" dy="0.9000" layer="1"/>   <smd name="2" x="-1.8625" y="-0.0000" dx="1.4750" dy="0.9000" layer="1"/>   <smd name="3" x="-1.9500" y="-1.5000" dx="1.3000" dy="0.9000" layer="1"/>+  <polygon width="0.1200" layer="21">+    <vertex x="-1.7700" y="2.2100"/>+    <vertex x="-2.0100" y="2.5400"/>+    <vertex x="-1.5300" y="2.5400"/>+    <vertex x="-1.7700" y="2.2100"/>+  </polygon>   <wire x1="-1.2200" y1="2.3600" x2="1.3600" y2="2.3600" width="0.1200" layer="21"/>   <wire x1="1.3600" y1="1.3800" x2="1.3600" y2="2.3600" width="0.1200" layer="21"/>   <wire x1="1.3600" y1="-1.3800" x2="1.3600" y2="-2.3600" width="0.1200" layer="21"/>@@ -68,35 +74,43 @@   <wire x1="1.2500" y1="-2.2500" x2="-1.2500" y2="-2.2500" width="0.1000" layer="51"/>   <text x="0" y="2.960" size="1.27" layer="25" align="bottom-center">&gt;NAME</text>   <text x="0" y="-2.960" size="1.27" layer="27" align="top-center">&gt;VALUE</text>-<!--adom-pin1--><polygon width="0.0500" layer="21"><vertex x="-1.7700" y="2.2100"/><vertex x="-2.0100" y="2.5400"/><vertex x="-1.5300" y="2.5400"/><vertex x="-1.7700" y="2.2100"/></polygon></package>+</package> </packages> <symbols>-<symbol name="SOT-89-3">-  <wire x1="-7.62" y1="3.81" x2="7.62" y2="3.81" width="0.254" layer="94"/>-  <wire x1="7.62" y1="3.81" x2="7.62" y2="-3.81" width="0.254" layer="94"/>-  <wire x1="7.62" y1="-3.81" x2="-7.62" y2="-3.81" width="0.254" layer="94"/>-  <wire x1="-7.62" y1="-3.81" x2="-7.62" y2="3.81" width="0.254" layer="94"/>-  <text x="0" y="6.35" size="1.27" layer="95" align="bottom-center">&gt;NAME</text>-  <text x="0" y="-6.35" size="1.27" layer="96" align="top-center">&gt;VALUE</text>-  <pin name="1" x="-12.7" y="2.54" length="short" direction="pas"/>-  <pin name="2" x="-12.7" y="0" length="short" direction="pas"/>-  <pin name="3" x="12.7" y="2.54" length="short" direction="pas" rot="R180"/>+<symbol name="AZ1117CR-3.3TRG1">+  <wire x1="-12.7" y1="2.54" x2="12.7" y2="2.54" width="0.254" layer="94"/>+  <wire x1="12.7" y1="2.54" x2="12.7" y2="-5.08" width="0.254" layer="94"/>+  <wire x1="12.7" y1="-5.08" x2="-12.7" y2="-5.08" width="0.254" layer="94"/>+  <wire x1="-12.7" y1="-5.08" x2="-12.7" y2="2.54" width="0.254" layer="94"/>+  <text x="0" y="5.08" size="1.27" layer="95" align="bottom-center">&gt;NAME</text>+  <text x="0" y="-7.62" size="1.27" layer="96" align="top-center">&gt;VALUE</text>+  <pin name="GND" x="-17.78" y="0" length="middle" direction="pwr"/>+  <pin name="OUTPUT" x="-17.78" y="-2.54" length="middle" direction="out"/>+  <pin name="VOUT" x="17.78" y="0" length="middle" direction="out" rot="R180"/>+  <pin name="INPUT" x="17.78" y="-2.54" length="middle" direction="pwr" rot="R180"/> </symbol> </symbols> <devicesets>-<deviceset name="SOT-89-3" prefix="U">-  <description>SOT-89-3 (symbol synthesized from footprint pads)</description>+<deviceset name="AZ1117CR-3.3TRG1" prefix="U">+  <description></description>   <gates>-    <gate name="G$1" symbol="SOT-89-3" x="0" y="0"/>+    <gate name="G$1" symbol="AZ1117CR-3.3TRG1" x="0" y="0"/>   </gates>   <devices>-    <device name="" package="SOT-89-3">+    <device name="" package="AZ1117CR-3.3TRG1">       <connects>-        <connect gate="G$1" pin="1" pad="1"/>-        <connect gate="G$1" pin="2" pad="2"/>-        <connect gate="G$1" pin="3" pad="3"/>+        <connect gate="G$1" pin="GND" pad="1"/>+        <connect gate="G$1" pin="OUTPUT" pad="2"/>+        <connect gate="G$1" pin="VOUT" pad="2"/>+        <connect gate="G$1" pin="INPUT" pad="3"/>       </connects>-      <technologies><technology name=""/></technologies>+      <technologies>+        <technology name="">+          <attribute name="MPN" value="AZ1117CR-3.3TRG1" constant="no"/>+          <attribute name="MANUFACTURER" value="Diodes Incorporated AZ1117CR 3 3TRG1" constant="no"/>+          <attribute name="LCSC_PN" value="C460428" constant="no"/>+        </technology>+      </technologies>     </device>   </devices> </deviceset>
pinmap.jsonadded+3
@@ -0,0 +1,3 @@+{+ "4": "2"+}\ No newline at end of file