Loads when you scroll to it. Unloads after 5 minutes in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

PCB Footprint

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Loads when you scroll to it. Unloads after 5 minutes in the background.
Download PDF
Contents

README

markdown

AZ1117CH2-5.0TRG1

Diodes Incorporated · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-223

AZ1117CH2-5.0TRG1 from Diodes Incorporated, in a SOT-223. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 INPUT power_in Unregulated input supply. Absolute max 18 V; recommended operating max 15 V. Requires a 10 µF (or larger) bypass capacitor to GND close to the pin for stability.
2 ADJ/GND power_in Ground reference on the fixed-voltage AZ1117C-5.0 version (ADJ pin is internally tied to GND on fixed variants). Serves as the return for both the input bypass and output capacitors.
3 OUTPUT power_out Regulated 5.0 V output (±1% at 25 °C, ±2% over -20 to +125 °C). Current limit 1.35 A typ. Requires a minimum 22 µF (ESR < 20 Ω) ceramic output capacitor for stability.
4 ADJ/GND power_in SOT-223 thermal tab, electrically connected to the ADJ/GND pin. On fixed 5.0 V version this is GND; solder to a copper pour to improve θJA (≈125 °C/W without heatsink, 100 °C/W with heatsink for SOT223).

Key specifications

Parameter Value
Manufacturer Diodes Incorporated
Package SOT-223
Category PMIC
Pins 4

Ordering variants

  • AZ1117CH2-5.0TRG1
  • AZ1117CH2-5.0TRG1H
  • AZ1117CH2-5.0TRG1D
  • AZ1117CH2-5.0TRG1CJ
  • AZ1117CH2-5.0TRG1R
  • AZ1117CH2-5.0TRG1R2

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Output Voltage (TJ = +25°C) VOUT 4.95 5 5.05 V 1.5V ≤ VIN-VOUT ≤ 10V 7
Output Voltage (over junction temperature range) VOUT 4.9 5 5.1 V 1.5V ≤ VIN-VOUT ≤ 10V 7
Line Regulation (TJ = +25°C) VRLINE 0.5 6 mV 1.5V ≤ VIN-VOUT ≤ 10V 7
Line Regulation (over junction temperature range) VRLINE 10 mV 1.5V ≤ VIN-VOUT ≤ 10V 7
Load Regulation (TJ = +25°C) VRLOAD 2 mV 7
Load Regulation (over junction temperature range) VRLOAD 15 mV 7
Dropout Voltage (SOT223) VDROP 1.2 1.3 V ΔVOUT = 1%, IOUT = 0.8A 7
Current Limit ILIMIT 1 1.35 A 7
Quiescent Current IQ 4 6 mA IOUT = 0 7
Input Voltage (absolute maximum) VIN 18 V 4
Operating Junction Temperature Range (absolute maximum) TJ 150 °C 4
Storage Temperature Range TSTG -65 150 °C 4
Lead Temperature (soldering) TLEAD 260 °C Soldering, 10 sec 4
ESD (Human Body Model) 4000 V Human Body Model 4
Input Voltage (recommended operating) VIN 15 V 4
Operating Junction Temperature Range (recommended operating) TJ -20 125 °C 4
Thermal Resistance Junction-to-Ambient, without heatsink, SOT223 θJA 125 °C/W Without heatsink, SOT223 4
Thermal Resistance Junction-to-Ambient, with heatsink, SOT223 θJA 100 °C/W With heatsink (Note 6: 100mm² copper, 2oz, 2-layer FR-4) 4
Thermal Resistance Junction-to-Case, SOT223 θJC 15 °C/W 7

CAD (KiCad official)

  • Symbol: AZ1117CH2-5.0TRG1
  • Footprint: Package_TO_SOT_SMD:SOT-223-3_TabPin2
  • 3D model: SOT-223 (KiCad packages3D, STEP)
  • 3D model files: az1117ch2-5-0trg1-etched.step / az1117ch2-5-0trg1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); az1117ch2-5-0trg1.step / az1117ch2-5-0trg1.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
az1117ch2-5-0trg1.step 64 KB You want the bare part, or you mark your own boards.
az1117ch2-5-0trg1-etched.step 2.3 MB You want the part with AZ1117CH2-5.0TRG1 already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 584 faces against 75 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Diodes Incorporated datasheet (24 pp, sha256 8333717aa7b5f90f, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF