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AXP203

Allwinner Tech · Battery Management · VQFN-48-EP(6x6)

AXP203 from Allwinner Tech, in a VQFN-48-EP(6x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SDA bidirectional Data pin for the serial (TWSI) interface, normally connected through a 2.2K resistor to 3.3V I/O power.
2 SCK input Clock pin for the serial (TWSI) interface, normally connected through a 2.2K resistor to 3.3V I/O power.
3 GPIO3 bidirectional General-purpose I/O 3, configured through register REG9EH[7] as printed in the pin table.
4 N_OE input Power output on/off switch: connected to GND turns the outputs on, connected to IPSOUT turns them off.
5 GPIO2 bidirectional General-purpose I/O 2.
6 N_VBUSEN input Selects VBUS-to-IPSOUT path: GND selects IPSOUT from VBUS, high level means VBUS is not selected.
7 VIN2 power_in Input source for DCDC2.
8 LX2 bidirectional Inductor pin for DCDC2.
9 PGND2 power_in NMOS ground for DCDC2.
10 DCDC2 input DC-DC2 feedback pin.
11 LDO4 output Output pin of LDO4.
12 LDO2 output Output pin of LDO2.
13 LDO24IN power_in Input to LDO2 and LDO4.
14 VIN3 power_in Input source for DCDC3.
15 LX3 bidirectional Inductor pin for DCDC3.
16 PGND3 power_in NMOS ground for DCDC3.
17 DCDC3 input Feedback pin for DCDC3.
18 GPIO1 bidirectional General-purpose I/O 1, which can also be used as an ADC input.
19 GPIO0 bidirectional General-purpose I/O 0, which can also be used as a low-noise LDO/switch output or ADC input.
20 EXTEN output External power enable output.
21 APS power_in Internal power input.
22 AGND power_in Analog ground.
23 BIAS bidirectional Connects to an external 200 kOhm 1% resistor.
24 VREF power_in Internal reference voltage output.
25 PWROK output Power good indication output.
26 VINT power_out Internal logic power, 2.5V.
27 LDO1SET input Sets the default voltage of LDO1 (GND gives 1.3V, VINT gives 3.3V per the default-voltage table).
28 LDO1 output LDO1 output, for the host RTC block.
29 DC3SET input Sets the default voltage of DCDC3 (GND gives 1.8V, APS gives 3.3V/2.5V, floating gives 1.2V/1.5V per the default-voltage table).
30 BACKUP bidirectional Backup battery pin for the RTC backup battery.
31 VBUS power_in USB VBUS input.
32 ACIN power_in Adapter input (pin 32 of the ACIN pair).
33 ACIN power_in Adapter input (pin 33 of the ACIN pair).
34 IPSOUT bidirectional Main battery connection (pin 34 of the IPSOUT pair).
35 IPSOUT bidirectional Main battery connection (pin 35 of the IPSOUT pair).
36 CHGLED output Charger status indication output.
37 TS input Battery temperature sensor input or an external ADC input.
38 BAT power_out System power source (pin 38 of the BAT pair).
39 BAT power_out System power source (pin 39 of the BAT pair).
40 LDO3IN power_in Input source for LDO3.
41 LDO3 output Output pin of LDO3.
42 BATSENSE input Current sense port 1.
43 CHSENSE output Current sense port 2.
44 VIN1 power_in Input source for DCDC1.
45 LX1 bidirectional Inductor pin for DCDC1.
46 PGND1 power_in NMOS ground for DCDC1.
47 PWRON input Power on/off key input, with an internal 100k pull-up to APS.
48 IRQ/WAKEUP bidirectional IRQ output or wakeup input.
49 EP power_in Exposed pad, which must be connected to system ground.

Key specifications

Parameter Value
Manufacturer Allwinner Tech
Package VQFN-48-EP(6x6)
Category Power Management (PMIC)
Pins 49

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
ACIN Input Voltage ACIN -0.3 11 V 12
VBUS Input Voltage VBUS -0.3 11 V 12
Operating Temperature Range TJ -40 130 ℃ 12
Storage Temperature Range Ts -40 150 ℃ 12
Maximum Soldering Temperature TLEAD 300 ℃ at leads, 10sec 12
Internal Power Dissipation PD 2100 mW 12
ACIN Input Voltage VIN 3.8 6.3 V 13
IPS Output Voltage (ACIN) VOUT 2.9 5 V 13
VBUS Input Voltage VIN 3.8 6.3 V 13
VOUT Current Available Before Loading BAT (VBUS) IOUT 500 900 mA 13
IPS Output Voltage (VBUS) VOUT 2.9 5 V 13
BAT Charge Target Voltage tolerance VTRGT -0.5 0.5 % 13
Charge Current ICHRG 1200 1800 mA 13
Backup Battery Charge Target Voltage VTRGT 2.5 3 3.1 V 13
Backup Battery Charge Current ICHRG 50 200 400 uA 13
Backup Current when use Backup Battery IBackup 10 15 uA 13
Cold Temperature Fault Threshold Voltage VTL 0 2.112 3.264 V Charge 13
Hot Temperature Fault Threshold Voltage VTH 0 0.397 3.264 V Charge 14
End of Charge Indication Current Ratio IEND 10 15 % CV Mode 13
DCDC2 Output Voltage Range VDC2OUT 0.7 2.275 V 14
DCDC3 Output Voltage Range VDC3OUT 0.7 3.5 V 14
LDO1 Output Voltage tolerance VLDO1 -1 1 % ILDO1=1mA 14
LDO2 Output Voltage VLDO2 1.8 3.3 V ILDO2=1mA 14
LDO3 Output Voltage VLDO3 0.7 3.5 V ILDO3=1mA 15
LDO4 Output Voltage (printed as VLDO3 in LDO4 block) VLDO3 1.8 3.3 V ILDO3=1mA 15
LDO5 Output Voltage VLDO5 1.5 3.3 V I LDO5=1mA 15
SDA/SCK Clock Operating Frequency fSCK 400 1200 kHZ 14
VOUT Current Available Before Loading BAT (ACIN) IOUT 2500 mA 500mV Voltage Drop 13
ACIN Under Voltage Lockout VUVLO 3.8 V 13
Internal Ideal Diode On Resistance (ACIN) RACIN 170 mΩ PIN to PIN, ACIN to IPSOUT 13
VBUS Under Voltage Lockout VUVLO 3.8 V 13
Internal Ideal Diode On Resistance (VBUS) RVBUS 300 mΩ PIN to PIN, VBUS to IPSOUT 13
Trickle Charge Threshold Voltage VTRKL 3 V 13
Recharge Battery Threshold Voltage ΔVRECHG -100 mV Threshold Voltage Relative to VTARGET 13
Charger Safety Timer Termination Time (Trickle Mode) TTIMER1 40 Min Trickle Mode 13
Charger Safety Timer Termination Time (CC Mode) TTIMER2 480 Min CC Mode 13
Cold Temperature Fault Threshold Voltage (Discharge) VTL 3.226 V Discharge 13
Hot Temperature Fault Threshold Voltage (Discharge) VTH 0.282 V Discharge 14
NTC Disable Threshold Voltage Hysteresis VTE 0.2 V Falling Threshold Hysteresis 14
Ideal Diode On Resistance (BAT to IPSOUT) Rds(on) 75 mΩ 14
OFF Mode Current IBATOFF 27 μA BAT=3.8V 14
USB VBUS suspend Mode current ISUSPEND 86 μA BAT=3.8V, VBUS=5V, N_VBUSEN=1 14
Logic Low Input Voltage VIL 0.3 V 14
Logic High Input Voltage VIH 2 V 14
TWSI Input Supply Voltage VCC 3.3 V 14
Clock Data Fall Time tf 60 ns 2.2Kohm Pull High 14
Clock Data Rise Time tr 100 ns 2.2Kohm Pull High 14
Oscillator Frequency fOSC 1.5 MHz Default 14
DCDC2 PMOS Switch Current Limit ILIM2 2300 mA PWM Mode 14
DCDC2 Available Output Current IDC2OUT 1800 mA PWM Mode 14
DCDC3 PMOS Switch Current Limit ILIM3 1400 mA PWM Mode 14
DCDC3 Available Output Current IDC3OUT 1000 mA PWM Mode 14
LDO1 Output Current ILDO1 30 mA 14
LDO2 Output Current ILDO2 200 mA 14
LDO2 Output Noise, 20-80KHz eN 28 μVRMS Vo=3V , Io=150mA 14
LDO3 Output Current ILDO3 200 mA 15
LDO4 Output Current (printed as ILDO3 in LDO4 block) ILDO3 200 mA 15
LDO4 Output Noise, 20-80KHz eN 18 μVRMS Vo=1.8V , Io=150mA 15
LDO5 Output Current ILDO5 50 mA 15
LDO5 Output Noise, 20-80KHz eN 18 μVRMS Vo=1.8V, Io=30mA 15

CAD (KiCad official)

  • Symbol: AXP203
  • Footprint: Package_DFN_QFN:QFN-48-1EP_6x6mm_P0.4mm_EP4.2x4.2mm
  • 3D model: VQFN-48-EP(6x6), generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.9 mm nominal QFN height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
  • 3D model files: axp203-etched.step / axp203-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); axp203.step / axp203.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Allwinner Tech datasheet (55 pp, sha256 68b3d0fd08268a5f, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF