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AW37030D180DNR

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AWINIC Shanghai Awinic Tech Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, DFN1x1-4L. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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AW37030D180DNR

AWINIC Shanghai Awinic Tech · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · DFN1x1-4L

AW37030D180DNR from AWINIC Shanghai Awinic Tech, in a DFN1x1-4L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT power_out Regulated output voltage pin; put a 1μF or more ceramic capacitor at the output pin.
2 GND power_in Ground.
3 CE input Chip enable pin (high active) with a built-in 140nA pull-down current; the device is disabled below 0.4V and enabled above 1V.
4 IN power_in Input supply pin, with an input voltage range of 1.4V to 5.5V; put a 1μF or more bypass capacitor at the power supply.
5 EXP passive Exposed pad should be tied to the ground plane for better power dissipation.

Key specifications

Parameter Value
Manufacturer AWINIC Shanghai Awinic Tech
Package DFN1x1-4L
Category Power Management (PMIC)
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Voltage Range VIN 1.4 5.5 V 8
Output Voltage Accuracy VOUT_ACC -1 1 % TA=25°C 8
Output Voltage Accuracy VOUT_ACC -2 2 % -40°C ≤TA≤85°C 8
Load Regulation LOADReg 1 20 mV 1mA≤IOUT≤300mA 8
Line Regulation LINEReg 1 5 mV VOUT(SET)+0.5V≤VIN ≤5.5V 8
Dropout Voltage VOUT(SET)=1.8V Vdropout 310 403 mV IOUT=300mA, when VOUT falls 100mV below VOUT(SET) 8
Shutdown Current ISD 0.1 1 µA VCE<0.4V 8
Quiescent Current IQ 50 100 µA IOUT=0mA 8
CE Input Voltage H VCEH 1 V -40°C ≤TA≤85°C 8
CE Input Voltage L VCEL 0.4 V -40°C ≤TA≤85°C 8
Power Supply Ripple Rejection PSRR 90 dB IOUT=30mA, f=1kHz, VOUT(SET)=1.8V 8
Output Voltage Noise VOUT(SET)=1.8V VN 33 µVrms IOUT=30mA, BW=10Hz to 100kHz 8
Output Current Limit ICL 300 mA VOUT=90%*VOUT(SET) 8
Short Current Limit ISC 120 mA VOUT<10%*VOUT(SET) 8
Output Voltage Temperature Coefficient VTC -40 40 ppm/°C -40°C ≤TA≤85°C 8
Auto Discharge Resistance RDISC 130 Ω VIN=4V, VCE<0.4V, VOUT=2.8V 8
CE Pull Down Current ICE 140 nA 8
Thermal Shutdown Threshold Temperature Rising TSDH 160 °C 8
Thermal Shutdown Reset Threshold Temperature Falling TSDL 130 °C 8
Input Voltage (absolute maximum) VIN -0.3 6.5 V 7
Enable Control Voltage Range VCE -0.3 6.5 V 7
Output Voltage Range VOUT -0.3 6.5 V 7
Maximum Operating Junction Temperature TJ_MAX 150 °C 7
Storage Temperature TSTG -65 150 °C 7
Lead Temperature (soldering 10 seconds) 260 °C soldering 10 seconds 7
ESD HBM -2 2 kV ESDA/JEDEC JS-001-2017, all pins 7
ESD CDM -1.5 1.5 kV ESDA/JEDEC JS-002-2018, all pins 7
Latch-Up IT -200 200 mA JESD78E 7
Recommended Operating Junction Temperature TJ_REC -40 125 °C 7
Operating Free-Air Temperature Range TA -40 85 °C 7
Maximum Power Consumption DFN 1mmX1mm-4L PD 464 mW TA=25°C, TJ_REC=125°C 7
Junction-to-ambient thermal resistance DFN 1mmX1mm-4L RθJA 215.4 °C/W JEDEC 2S2P 7
Junction-to-case(top) thermal resistance DFN 1mmX1mm-4L RθJC(top) 161.85 °C/W JEDEC 2S2P; SEMI G43-87 for DFN 7
Junction-to-board thermal resistance DFN 1mmX1mm-4L RθJB 156.4 °C/W JEDEC 2S2P 7
Junction-to-top characterization parameter DFN 1mmX1mm-4L ψJT 17.3 °C/W JEDEC 2S2P 7
Junction-to-board characterization parameter DFN 1mmX1mm-4L ψJB 170.4 °C/W JEDEC 2S2P 7
Junction-to-case(bottom) thermal resistance DFN 1mmX1mm-4L RθJC(bot) 118 °C/W JEDEC 2S2P 7

CAD (KiCad official)

  • Symbol: AW37030D180DNR
  • Footprint: Package_DFN_QFN:UDFN-4-1EP_1x1mm_P0.65mm_EP0.48x0.48mm
  • 3D model: DFN1x1-4L (KiCad packages3D, STEP)
  • 3D model files: aw37030d180dnr-etched.step / aw37030d180dnr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); aw37030d180dnr.step / aw37030d180dnr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: AWINIC Shanghai Awinic Tech datasheet (27 pp, sha256 91a307f30463cbe0, retrieved 2026-10-15, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF