# AVRL101D3R3FTA

**TDK** · Varistors · 0402

AVRL101D3R3FTA from TDK, in a 0402. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1 | passive | Non-polar varistor terminal; connect to the signal/power line, with 20 Vdc max continuous voltage, 27 V (21.6 to 32.4 V) varistor voltage at 1 mA and 8 kV ESD tolerance (IEC61000-4-2). |
| 2 | 2 | passive | Non-polar varistor terminal; connect to ground or the other side of the protected line, with 20 Vdc max continuous voltage and 62 V clamping at 0.5 A (8/20 µs). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | TDK |
| Package | 0402 |
| Category | Circuit Protection |
| Pins | 2 |

## CAD (KiCad official)

- Symbol: `AVRL101D3R3FTA`
- Footprint: `Resistor_SMD:R_0402_1005Metric`
- 3D model: 0402 (KiCad packages3D, STEP)
- 3D model files: `avrl101d3r3fta-etched.step` / `avrl101d3r3fta-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `avrl101d3r3fta.step` / `avrl101d3r3fta.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [TDK datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8558282590173364224) (19 pp, sha256 `d4c2107b21fc5d20`, retrieved 2026-10-09, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/avrl101d3r3fta-datasheet.pdf)