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AVR32DB32-I

Microchip Tech · New Arrivals · VQFN-32(5x5)

AVR32DB32-I from Microchip Tech, in a VQFN-32(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PA3 bidirectional Port A pin 3 general-purpose I/O with USART0 XDIR, TWI0 SCL (host/client, Fm+), TCA0 WO3, TCB1 WO and CCL LUT0 OUT functions.
2 PA4 bidirectional Port A pin 4 general-purpose I/O with alternate USART0 TxD, SPI0 MOSI, TCA0 WO4 and TCD0 WOA functions.
3 PA5 bidirectional Port A pin 5 general-purpose I/O with alternate USART0 RxD, SPI0 MISO, TCA0 WO5 and TCD0 WOB functions.
4 PA6 bidirectional Port A pin 6 general-purpose I/O with alternate USART0 XCK, SPI0 SCK, TCD0 WOC and LUT0 OUT functions.
5 PA7 bidirectional Port A pin 7 general-purpose I/O with CLKOUT, comparator/ZCD OUT, SPI0 SS, TCD0 WOD and EVOUTA functions.
6 PC0 bidirectional Port C pin 0 general-purpose I/O (VDDIO2 domain) with USART1 TxD, SPI1 MOSI, TCA0 WO0, TCB2 WO and LUT1 IN0 functions.
7 PC1 bidirectional Port C pin 1 general-purpose I/O (VDDIO2 domain) with USART1 RxD, SPI1 MISO, TCA0 WO1, TCB3 WO and LUT1 IN1 functions.
8 PC2 bidirectional Port C pin 2 general-purpose I/O (VDDIO2 domain) with TWI Fm+ capability, USART1 XCK, SPI1 SCK, TWI0 SDA, TCA0 WO2, EVOUTC and LUT1 IN2 functions.
9 PC3 bidirectional Port C pin 3 general-purpose I/O (VDDIO2 domain) with TWI Fm+ capability, USART1 XDIR, SPI1 SS, TWI0 SCL, TCA0 WO3 and LUT1 OUT functions.
10 VDDIO2 power_in Supply for the multi-voltage I/O port C pins, which may be at a different voltage from VDD in dual-supply mode and must be connected to VDD in single-supply mode.
11 PD1 bidirectional Port D pin 1 general-purpose I/O with ADC0 AIN1, OPAMP OP0 INP, ZCD0 ZCIN, TCA0 WO1 and LUT2 IN1 functions.
12 PD2 bidirectional Port D pin 2 general-purpose I/O with ADC0 AIN2, comparator AINP0, OPAMP OP0 OUT, TCA0 WO2, EVOUTD and LUT2 IN2 functions.
13 PD3 bidirectional Port D pin 3 general-purpose I/O with ADC0 AIN3, comparator AINN0/AINP1, OPAMP OP0 INN, TCA0 WO3 and LUT2 OUT functions.
14 PD4 bidirectional Port D pin 4 general-purpose I/O with ADC0 AIN4, comparator AINP2/AINP1, OPAMP OP1 INP and TCA0 WO4 functions.
15 PD5 bidirectional Port D pin 5 general-purpose I/O with ADC0 AIN5, comparator AINN0, OPAMP OP1 OUT and TCA0 WO5 functions.
16 PD6 bidirectional Port D pin 6 general-purpose I/O with ADC0 AIN6, comparator AINP3, DAC0 OUT and LUT2 OUT functions.
17 PD7 bidirectional Port D pin 7 general-purpose I/O with external voltage reference input VREFA, ADC0 AIN7, comparator AINN2, OPAMP OP1 INN and EVOUTD functions.
18 AVDD power_in Powers I/O lines, XOSC32K and the analog peripherals; internally connected to VDD and must receive the same voltage as VDD.
19 GND power_in Analog ground (AGND), common ground for the VDD, AVDD and VDDIO2 domains.
20 PF0 bidirectional Port F pin 0 general-purpose I/O with XTAL32K1 crystal connection, ADC0 AIN16, USART2 TxD, TCA0 WO0 and LUT3 IN0 functions.
21 PF1 bidirectional Port F pin 1 general-purpose I/O with XTAL32K2 crystal connection, ADC0 AIN17, USART2 RxD, TCA0 WO1 and LUT3 IN1 functions.
22 PF2 bidirectional Port F pin 2 general-purpose I/O with TWI Fm+ capability, ADC0 AIN18, USART2 XCK, TWI1 SDA, TCA0 WO2, EVOUTF and LUT3 IN2 functions.
23 PF3 bidirectional Port F pin 3 general-purpose I/O with TWI Fm+ capability, ADC0 AIN19, USART2 XDIR, TWI1 SCL, TCA0 WO3 and LUT3 OUT functions.
24 PF4 bidirectional Port F pin 4 general-purpose I/O with ADC0 AIN20, alternate USART2 TxD, TCA0 WO4 and TCB0 WO functions.
25 PF5 bidirectional Port F pin 5 general-purpose I/O with ADC0 AIN21, alternate USART2 RxD, TCA0 WO5 and TCB1 WO functions.
26 PF6 input Port F pin 6, input only, used as the active-low RESET pin when the RSTPINCFG fuse enables external reset (pull-up enabled).
27 UPDI bidirectional Dedicated Unified Program and Debug Interface pin with no other function, using half-duplex asynchronous UART communication.
28 VDD power_in Supply for I/O lines, XOSCHF and the internal voltage regulator, with a decoupling capacitor required close to the pin.
29 GND power_in Ground, common to the VDD, AVDD and VDDIO2 domains.
30 PA0 bidirectional Port A pin 0 general-purpose I/O with XTALHF1 crystal connection or EXTCLK input, USART0 TxD, TCA0 WO0 and LUT0 IN0 functions.
31 PA1 bidirectional Port A pin 1 general-purpose I/O with XTALHF2 crystal connection, USART0 RxD, TCA0 WO1 and LUT0 IN1 functions.
32 PA2 bidirectional Port A pin 2 general-purpose I/O with TWI Fm+ capability, USART0 XCK, TWI0 SDA, TCA0 WO2, TCB0 WO, EVOUTA and LUT0 IN2 functions.
33 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package VQFN-32(5x5)
Category Others
Pins 33

CAD (KiCad official)

  • Symbol: AVR32DB32-I
  • Footprint: Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm
  • 3D model: VQFN-32(5x5) (KiCad packages3D, STEP)
  • 3D model files: avr32db32-i-etched.step / avr32db32-i-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); avr32db32-i.step / avr32db32-i.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (654 pp, sha256 ca77fe0d8b0229c0, retrieved 2026-11-02, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF