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AVR32DB28-E
Public Made by Adomby adom
Microchip Tech Microcontroller Units (MCUs/MPUs/SOCs), SOIC-28-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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AVR32DB28-E
Microchip Tech · Microcontroller Units (MCUs/MPUs/SOCs) · SOIC-28-300mil
AVR32DB28-E from Microchip Tech, in a SOIC-28-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PA7 | bidirectional | PORTA pin 7 general-purpose I/O on the VDD domain, with CLKOUT, USART0 XDIR (alt), SPI0 SS, TCD0 WOD, EVOUTA (alt) and ZCD output (default) functions. |
| 2 | PC0 | bidirectional | PORTC pin 0 general-purpose I/O on the VDDIO2 (MVIO) domain, with USART1 TxD, SPI1 MOSI, TCB2 WO and CCL LUT1-IN0 functions. |
| 3 | PC1 | bidirectional | PORTC pin 1 general-purpose I/O on the VDDIO2 (MVIO) domain, with USART1 RxD, SPI1 MISO, TCB3 WO (alt) and CCL LUT1-IN1 functions. |
| 4 | PC2 | bidirectional | PORTC pin 2 general-purpose I/O on the VDDIO2 (MVIO) domain, with USART1 XCK, SPI1 SCK, TWI Fm+ SDA (alt), EVOUTC and CCL LUT1-IN2 functions. |
| 5 | PC3 | bidirectional | PORTC pin 3 general-purpose I/O on the VDDIO2 (MVIO) domain, with USART1 XDIR, SPI1 SS, TWI Fm+ SCL (alt) and CCL LUT1-OUT functions. |
| 6 | VDDIO2 | power_in | Supply for the multi-voltage I/O pins (PORTC), independent of VDD; must be connected to VDD in single-supply mode. |
| 7 | PD1 | bidirectional | PORTD pin 1 general-purpose I/O with ADC0 AIN1, OPAMP OP0 INP, ZCD0 ZCIN and CCL LUT2-IN1 functions. |
| 8 | PD2 | bidirectional | PORTD pin 2 general-purpose I/O with ADC0 AIN2, AC0/1/2 AINP0, OPAMP OP0 OUT, EVOUTD and CCL LUT2-IN2 functions. |
| 9 | PD3 | bidirectional | PORTD pin 3 general-purpose I/O with ADC0 AIN3, AC0 AINN0, AC1 AINP1, OPAMP OP0 INN and CCL LUT2-OUT functions. |
| 10 | PD4 | bidirectional | PORTD pin 4 general-purpose I/O with ADC0 AIN4, AC1 AINP2, AC2 AINP1 and OPAMP OP1 INP functions. |
| 11 | PD5 | bidirectional | PORTD pin 5 general-purpose I/O with ADC0 AIN5, AC1 AINN0 and OPAMP OP1 OUT functions. |
| 12 | PD6 | bidirectional | PORTD pin 6 general-purpose I/O with ADC0 AIN6, AC0/1/2 AINP3, DAC0 OUT and CCL LUT2-OUT (alt) functions. |
| 13 | PD7 | bidirectional | PORTD pin 7 general-purpose I/O with VREFA external voltage reference input, ADC0 AIN7, AC AINN2, OPAMP OP1 INN and EVOUTD (alt) functions. |
| 14 | AVDD | power_in | Analog supply powering I/O lines, XOSC32K and the analog peripherals; internally connected to VDD and must be at the same voltage. |
| 15 | GND | power_in | Analog ground (AGND), common to the VDD, AVDD and VDDIO2 domains. |
| 16 | PF0 | bidirectional | PORTF pin 0 general-purpose I/O, also XTAL32K1 for the external 32.768 kHz crystal, with ADC0 AIN16, USART2 TxD and CCL LUT3-IN0 functions. |
| 17 | PF1 | bidirectional | PORTF pin 1 general-purpose I/O, also XTAL32K2 for the external 32.768 kHz crystal, with ADC0 AIN17, USART2 RxD and CCL LUT3-IN1 functions. |
| 18 | PF6 | input | Input-only pin PF6 that serves as the active-low external RESET input when enabled by the RSTPINCFG fuse, with pull-up enabled when configured as RESET. |
| 19 | UPDI | bidirectional | Dedicated Unified Program and Debug Interface pin for one-wire half-duplex UART programming and debugging, with no other function. |
| 20 | VDD | power_in | Positive supply powering I/O lines, XOSCHF and the internal voltage regulator. |
| 21 | GND | power_in | Ground, common to the VDD, AVDD and VDDIO2 domains. |
| 22 | PA0 | bidirectional | PORTA pin 0 general-purpose I/O, also XTALHF1 for the external high-frequency crystal or EXTCLK external clock input, with USART0 TxD, TCA0 WO0 and CCL LUT0-IN0 functions. |
| 23 | PA1 | bidirectional | PORTA pin 1 general-purpose I/O, also XTALHF2 for the external high-frequency crystal, with USART0 RxD, TCA0 WO1 and CCL LUT0-IN1 functions. |
| 24 | PA2 | bidirectional | PORTA pin 2 general-purpose I/O with USART0 XCK, TWI0 Fm+ SDA (host or client), TCA0 WO2, TCB0 WO, EVOUTA and CCL LUT0-IN2 functions. |
| 25 | PA3 | bidirectional | PORTA pin 3 general-purpose I/O with USART0 XDIR, TWI0 Fm+ SCL (host or client), TCA0 WO3, TCB1 WO and CCL LUT0-OUT functions. |
| 26 | PA4 | bidirectional | PORTA pin 4 general-purpose I/O with USART0 TxD (alt), SPI0 MOSI, TCA0 WO4 and TCD0 WOA functions. |
| 27 | PA5 | bidirectional | PORTA pin 5 general-purpose I/O with USART0 RxD (alt), SPI0 MISO, TCA0 WO5 and TCD0 WOB functions. |
| 28 | PA6 | bidirectional | PORTA pin 6 general-purpose I/O with USART0 XCK (alt), SPI0 SCK, TCD0 WOC and CCL LUT0-OUT (alt) functions. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-28-300mil |
| Category | Single Chip Microcomputer/Microcontroller |
| Pins | 28 |
CAD (KiCad official)
- Symbol:
AVR32DB28-E - Footprint:
Package_SO:SOIC-28W_7.5x17.9mm_P1.27mm - 3D model: SOIC-28-300mil (KiCad packages3D, STEP)
- 3D model files:
avr32db28-e-etched.step/avr32db28-e-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);avr32db28-e.step/avr32db28-e.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (665 pp, sha256
adfeb5005d481e53, retrieved 2026-10-30, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# AVR32DB28-E
**Microchip Tech** · Microcontroller Units (MCUs/MPUs/SOCs) · SOIC-28-300mil
AVR32DB28-E from Microchip Tech, in a SOIC-28-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PA7 | bidirectional | PORTA pin 7 general-purpose I/O on the VDD domain, with CLKOUT, USART0 XDIR (alt), SPI0 SS, TCD0 WOD, EVOUTA (alt) and ZCD output (default) functions. |
| 2 | PC0 | bidirectional | PORTC pin 0 general-purpose I/O on the VDDIO2 (MVIO) domain, with USART1 TxD, SPI1 MOSI, TCB2 WO and CCL LUT1-IN0 functions. |
| 3 | PC1 | bidirectional | PORTC pin 1 general-purpose I/O on the VDDIO2 (MVIO) domain, with USART1 RxD, SPI1 MISO, TCB3 WO (alt) and CCL LUT1-IN1 functions. |
| 4 | PC2 | bidirectional | PORTC pin 2 general-purpose I/O on the VDDIO2 (MVIO) domain, with USART1 XCK, SPI1 SCK, TWI Fm+ SDA (alt), EVOUTC and CCL LUT1-IN2 functions. |
| 5 | PC3 | bidirectional | PORTC pin 3 general-purpose I/O on the VDDIO2 (MVIO) domain, with USART1 XDIR, SPI1 SS, TWI Fm+ SCL (alt) and CCL LUT1-OUT functions. |
| 6 | VDDIO2 | power_in | Supply for the multi-voltage I/O pins (PORTC), independent of VDD; must be connected to VDD in single-supply mode. |
| 7 | PD1 | bidirectional | PORTD pin 1 general-purpose I/O with ADC0 AIN1, OPAMP OP0 INP, ZCD0 ZCIN and CCL LUT2-IN1 functions. |
| 8 | PD2 | bidirectional | PORTD pin 2 general-purpose I/O with ADC0 AIN2, AC0/1/2 AINP0, OPAMP OP0 OUT, EVOUTD and CCL LUT2-IN2 functions. |
| 9 | PD3 | bidirectional | PORTD pin 3 general-purpose I/O with ADC0 AIN3, AC0 AINN0, AC1 AINP1, OPAMP OP0 INN and CCL LUT2-OUT functions. |
| 10 | PD4 | bidirectional | PORTD pin 4 general-purpose I/O with ADC0 AIN4, AC1 AINP2, AC2 AINP1 and OPAMP OP1 INP functions. |
| 11 | PD5 | bidirectional | PORTD pin 5 general-purpose I/O with ADC0 AIN5, AC1 AINN0 and OPAMP OP1 OUT functions. |
| 12 | PD6 | bidirectional | PORTD pin 6 general-purpose I/O with ADC0 AIN6, AC0/1/2 AINP3, DAC0 OUT and CCL LUT2-OUT (alt) functions. |
| 13 | PD7 | bidirectional | PORTD pin 7 general-purpose I/O with VREFA external voltage reference input, ADC0 AIN7, AC AINN2, OPAMP OP1 INN and EVOUTD (alt) functions. |
| 14 | AVDD | power_in | Analog supply powering I/O lines, XOSC32K and the analog peripherals; internally connected to VDD and must be at the same voltage. |
| 15 | GND | power_in | Analog ground (AGND), common to the VDD, AVDD and VDDIO2 domains. |
| 16 | PF0 | bidirectional | PORTF pin 0 general-purpose I/O, also XTAL32K1 for the external 32.768 kHz crystal, with ADC0 AIN16, USART2 TxD and CCL LUT3-IN0 functions. |
| 17 | PF1 | bidirectional | PORTF pin 1 general-purpose I/O, also XTAL32K2 for the external 32.768 kHz crystal, with ADC0 AIN17, USART2 RxD and CCL LUT3-IN1 functions. |
| 18 | PF6 | input | Input-only pin PF6 that serves as the active-low external RESET input when enabled by the RSTPINCFG fuse, with pull-up enabled when configured as RESET. |
| 19 | UPDI | bidirectional | Dedicated Unified Program and Debug Interface pin for one-wire half-duplex UART programming and debugging, with no other function. |
| 20 | VDD | power_in | Positive supply powering I/O lines, XOSCHF and the internal voltage regulator. |
| 21 | GND | power_in | Ground, common to the VDD, AVDD and VDDIO2 domains. |
| 22 | PA0 | bidirectional | PORTA pin 0 general-purpose I/O, also XTALHF1 for the external high-frequency crystal or EXTCLK external clock input, with USART0 TxD, TCA0 WO0 and CCL LUT0-IN0 functions. |
| 23 | PA1 | bidirectional | PORTA pin 1 general-purpose I/O, also XTALHF2 for the external high-frequency crystal, with USART0 RxD, TCA0 WO1 and CCL LUT0-IN1 functions. |
| 24 | PA2 | bidirectional | PORTA pin 2 general-purpose I/O with USART0 XCK, TWI0 Fm+ SDA (host or client), TCA0 WO2, TCB0 WO, EVOUTA and CCL LUT0-IN2 functions. |
| 25 | PA3 | bidirectional | PORTA pin 3 general-purpose I/O with USART0 XDIR, TWI0 Fm+ SCL (host or client), TCA0 WO3, TCB1 WO and CCL LUT0-OUT functions. |
| 26 | PA4 | bidirectional | PORTA pin 4 general-purpose I/O with USART0 TxD (alt), SPI0 MOSI, TCA0 WO4 and TCD0 WOA functions. |
| 27 | PA5 | bidirectional | PORTA pin 5 general-purpose I/O with USART0 RxD (alt), SPI0 MISO, TCA0 WO5 and TCD0 WOB functions. |
| 28 | PA6 | bidirectional | PORTA pin 6 general-purpose I/O with USART0 XCK (alt), SPI0 SCK, TCD0 WOC and CCL LUT0-OUT (alt) functions. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-28-300mil |
| Category | Single Chip Microcomputer/Microcontroller |
| Pins | 28 |
## CAD (KiCad official)
- Symbol: `AVR32DB28-E`
- Footprint: `Package_SO:SOIC-28W_7.5x17.9mm_P1.27mm`
- 3D model: SOIC-28-300mil (KiCad packages3D, STEP)
- 3D model files: `avr32db28-e-etched.step` / `avr32db28-e-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `avr32db28-e.step` / `avr32db28-e.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Microchip Tech datasheet](docs/avr32db28-e-datasheet.pdf) (665 pp, sha256 `adfeb5005d481e53`, retrieved 2026-10-30, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/avr32db28-e-datasheet.pdf)