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AVR32DA32-E

Microchip Tech · Pre-ordered MCUs · VQFN-32-EP(5x5)

AVR32DA32-E from Microchip Tech, in a VQFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PA3 bidirectional General-purpose I/O pin PA3 that also carries TWI SCL (host), USART0 XDIR, TCA0 WO3 and PTC X3/Y3 functions, and can be used for external interrupt and as an event input.
2 PA4 bidirectional General-purpose I/O pin PA4 that also carries USART0 TxD, SPI0 MOSI, TCA0 WO4 and PTC X4/Y4 functions, and can be used for external interrupt and as an event input.
3 PA5 bidirectional General-purpose I/O pin PA5 that also carries USART0 RxD, SPI0 MISO, TCA0 WO5 and PTC X5/Y5 functions, and can be used for external interrupt and as an event input.
4 PA6 bidirectional General-purpose I/O pin PA6 that also carries USART0 XCK, SPI0 SCK, TCA0 WOC and PTC X6/Y6 functions, and can be used for external interrupt and as an event input.
5 PA7 bidirectional General-purpose I/O pin PA7 that also carries CLKOUT, USART0 XDIR, SPI0 SS, TCA0 WOD and PTC X7/Y7 functions, and can be used for external interrupt and as an event input.
6 PC0 bidirectional General-purpose I/O pin PC0 that also carries USART1 TxD, SPI1 MOSI, TCA0 WO0 (alternate position) and CCL LUT1 IN0 functions, and can be used for external interrupt and as an event input.
7 PC1 bidirectional General-purpose I/O pin PC1 that also carries USART1 RxD, SPI1 MISO, TCA0 WO1 (alternate position) and CCL LUT1 IN1 functions, and can be used for external interrupt and as an event input.
8 PC2 bidirectional General-purpose I/O pin PC2 that also carries TWI SDA (host), USART1 XCK, SPI1 SCK, TCA0 WO2 (alternate position), EVSYS EVOUTC and CCL LUT1 IN2 functions, and can be used for external interrupt and as an event input.
9 PC3 bidirectional General-purpose I/O pin PC3 that also carries TWI SCL (host), USART1 XDIR, SPI1 SS, TCA0 WO3 (alternate position) and CCL LUT1 OUT functions, and can be used for external interrupt and as an event input.
10 PD0 bidirectional I/O pin PD0 that also carries ADC0 AIN0, PTC X16/Y16, analog comparator negative input AINN1, TCA0 WO0 (alternate position) and CCL LUT2 IN0 functions, and can be used for external interrupt and as an event input.
11 PD1 bidirectional I/O pin PD1 that also carries ADC0 AIN1, PTC X17/Y17, analog comparator ZCIN input, TCA0 WO1 (alternate position) and CCL LUT2 IN1 functions, and can be used for external interrupt and as an event input.
12 PD2 bidirectional I/O pin PD2 that also carries ADC0 AIN2, PTC X18/Y18, analog comparator positive input AINP0, TCA0 WO2 (alternate position), EVSYS EVOUTD and CCL LUT2 IN2 functions, and can be used for external interrupt and as an event input.
13 PD3 bidirectional I/O pin PD3 that also carries ADC0 AIN3, PTC X19/Y19, analog comparator inputs AINN0/AINP1, TCA0 WO3 (alternate position) and CCL LUT2 OUT functions, and can be used for external interrupt and as an event input.
14 PD4 bidirectional I/O pin PD4 that also carries ADC0 AIN4, PTC X20/Y20, analog comparator inputs AINP2/AINP1 and TCA0 WO4 (alternate position) functions, and can be used for external interrupt and as an event input.
15 PD5 bidirectional I/O pin PD5 that also carries ADC0 AIN5, PTC X21/Y21, analog comparator negative input AINN0 and TCA0 WO5 (alternate position) functions, and can be used for external interrupt and as an event input.
16 PD6 bidirectional I/O pin PD6 that also carries ADC0 AIN6, PTC X22/Y22, analog comparator positive input AINP3, DAC0 VOUT and CCL LUT2 OUT functions, and can be used for external interrupt and as an event input.
17 PD7 bidirectional I/O pin PD7 that also carries the external voltage reference input VREFA, ADC0 AIN7, PTC X23/Y23, analog comparator negative inputs AINN2/AINN0, and EVSYS EVOUTD (alternate position) functions, and can be used for external interrupt and as an event input.
18 AVDD power_in Analog supply pin; VDD and AVDD are internally connected on the AVR DA family (no separate power domains), and the device operates from 1.8-5.5 V.
19 GND power_in Ground pin; each supply pin pair (VDD or AVDD with its GND pin) must have its own decoupling capacitor placed close to the device.
20 PF0 bidirectional I/O pin PF0 that also carries the XTAL32K1 crystal connection, ADC0 AIN16 (positive-only analog input), USART2 TxD, TCA0 WOA (alternate position) and CCL LUT3 IN0 functions.
21 PF1 bidirectional I/O pin PF1 that also carries the XTAL32K2 crystal connection, ADC0 AIN17 (positive-only analog input), USART2 RxD, TCA0 WOB (alternate position) and CCL LUT3 IN1 functions.
22 PF2 bidirectional I/O pin PF2 that also carries TWI SDA (host), ADC0 AIN18 (positive-only analog input), USART2 XCK, TCA0 WOC (alternate position), EVSYS EVOUTF and CCL LUT3 IN2 functions.
23 PF3 bidirectional I/O pin PF3 that also carries TWI SCL (host), ADC0 AIN19 (positive-only analog input), USART2 XDIR, TCA0 WOD (alternate position) and CCL LUT3 OUT functions.
24 PF4 bidirectional I/O pin PF4 that also carries ADC0 AIN20 (positive-only analog input), USART2 TxD (alternate position), TCA0 WO4 (alternate position) and TCB0 WO (alternate position) functions.
25 PF5 bidirectional I/O pin PF5 that also carries ADC0 AIN21 (positive-only analog input), USART2 RxD (alternate position), TCA0 WO5 (alternate position) and TCB1 WO (alternate position) functions.
26 PF6 input PF6 is an input-only pin that serves as the active-low external RESET pin when the RSTPINCFG fuse selects it (otherwise it is a general input), and the device has an internal pull-up on RESET.
27 UPDI bidirectional Dedicated UPDI pin with no other function, used for one-wire half-duplex UART programming and debugging, with a default UPDI clock start-up frequency of 4 MHz.
28 VDD power_in Digital supply pin; all VDD pins are internally connected and the same voltage must be applied to each, with the device operating from 1.8-5.5 V.
29 GND power_in Ground pin; each supply pin pair (VDD or AVDD with its GND pin) must have its own decoupling capacitor placed close to the device.
30 PA0 bidirectional I/O pin PA0 that also carries the EXTCLK external clock input, PTC X0/Y0, USART0 TxD (alternate position), TCA0 WO0 and CCL LUT0 IN0 functions, and can be used for external interrupt and as an event input.
31 PA1 bidirectional I/O pin PA1 that also carries PTC X1/Y1, USART0 RxD, TCA0 WO1 and CCL LUT0 IN1 functions, and can be used for external interrupt and as an event input.
32 PA2 bidirectional I/O pin PA2 that also carries TWI SDA (host), PTC X2/Y2, USART0 XCK, TCA0 WO2, EVSYS EVOUTA and CCL LUT0 IN2 functions, and can be used for external interrupt and as an event input.
33 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package VQFN-32-EP(5x5)
Category Embedded Processors & Controllers
Pins 33

CAD (KiCad official)

  • Symbol: AVR32DA32-E
  • Footprint: Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm
  • 3D model: VQFN-32-EP(5x5) (KiCad packages3D, STEP)
  • 3D model files: avr32da32-e-etched.step / avr32da32-e-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); avr32da32-e.step / avr32da32-e.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (670 pp, sha256 2adadb731c62045b, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF