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AVR32DA28-E
Public Made by Adomby adom
Microchip Tech Pre-ordered MCUs, SOIC-28-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownAVR32DA28-E
Microchip Tech · Pre-ordered MCUs · SOIC-28-300mil
AVR32DA28-E from Microchip Tech, in a SOIC-28-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PA7 | bidirectional | General purpose I/O PORTA pin 7, with CLKOUT, PTC X7/Y7, ZCD output (0,OUT/1,OUT/2,OUT), TCA0 WOD alternate, SPI0 SS and EVOUTA alternate functions. |
| 2 | PC0 | bidirectional | General purpose I/O PORTC pin 0, with USART1 TxD, SPI0 MOSI, TCB WO and CCL LUT1 IN0 functions. |
| 3 | PC1 | bidirectional | General purpose I/O PORTC pin 1, with USART1 RxD, SPI0 MISO, TCB WO and CCL LUT1 IN1 functions. |
| 4 | PC2 | bidirectional | General purpose I/O PORTC pin 2 with TWI function, USART1 XCK, SPI0 SCK, EVOUTC and CCL LUT1 IN2 functions; has full asynchronous pin-change detection. |
| 5 | PC3 | bidirectional | General purpose I/O PORTC pin 3 with TWI function, USART1 XDIR, SPI0 SS and CCL LUT1 OUT functions. |
| 6 | PD0 | bidirectional | General purpose I/O PORTD pin 0, with ADC0 AIN0, PTC X16/Y16, AC AINN1 and CCL LUT2 IN0 functions. |
| 7 | PD1 | bidirectional | General purpose I/O PORTD pin 1, with ADC0 AIN1, PTC X17/Y17, ZCD0 ZCIN and CCL LUT2 IN1 functions. |
| 8 | PD2 | bidirectional | General purpose I/O PORTD pin 2, with ADC0 AIN2, PTC X18/Y18, AC AINP0, EVOUTD and CCL LUT2 IN2 functions; has full asynchronous pin-change detection. |
| 9 | PD3 | bidirectional | General purpose I/O PORTD pin 3, with ADC0 AIN3, PTC X19/Y19, AC AINN0/AINP1 and CCL LUT2 OUT functions. |
| 10 | PD4 | bidirectional | General purpose I/O PORTD pin 4, with ADC0 AIN4, PTC X20/Y20 and AC AINP2/AINP1 functions. |
| 11 | PD5 | bidirectional | General purpose I/O PORTD pin 5, with ADC0 AIN5, PTC X21/Y21 and AC1 AINN0 functions. |
| 12 | PD6 | bidirectional | General purpose I/O PORTD pin 6, with ADC0 AIN6, PTC X22/Y22, AC AINP3, DAC0 VOUT and CCL LUT2 OUT alternate functions; has full asynchronous pin-change detection. |
| 13 | PD7 | bidirectional | General purpose I/O PORTD pin 7, also external voltage reference input VREFA, with ADC0 AIN7, PTC X23/Y23, AC AINN2 and EVOUTD alternate functions. |
| 14 | AVDD | power_in | Analog supply pin, internally connected to VDD (no separate power domain on the AVR DA family). |
| 15 | GND | power_in | Ground. |
| 16 | PF0 | bidirectional | General purpose I/O PORTF pin 0, also XTAL32K1 32.768 kHz crystal pin, with ADC0 AIN16 (positive input only), PTC X32/Y32 and CCL LUT3 IN0 functions. |
| 17 | PF1 | bidirectional | General purpose I/O PORTF pin 1, also XTAL32K2 32.768 kHz crystal pin, with ADC0 AIN17 (positive input only), PTC X33/Y33 and CCL LUT3 IN1 functions. |
| 18 | PF6 (RESET) | input | Active-low external Reset input with internal pull-up when enabled by RSTPINCFG fuse; otherwise an input-only general purpose pin. |
| 19 | UPDI | bidirectional | Unified Program and Debug Interface pin using half-duplex one-wire UART communication; dedicated pin with no other function. |
| 20 | VDD | power_in | Digital supply voltage pin (device supply range 1.8-5.5V). |
| 21 | GND | power_in | Ground. |
| 22 | PA0 | bidirectional | General purpose I/O PORTA pin 0, also EXTCLK external clock input, with PTC X0/Y0, USART0 TxD, TCA0 WO0 and CCL LUT0 IN0 functions. |
| 23 | PA1 | bidirectional | General purpose I/O PORTA pin 1, with PTC X1/Y1, USART0 RxD, TCA0 WO1 and CCL LUT0 IN1 functions. |
| 24 | PA2 | bidirectional | General purpose I/O PORTA pin 2 with TWI function, PTC X2/Y2, USART0 XCK, TWI0 SDA (master), EVOUTA and CCL LUT0 IN2 functions; has full asynchronous pin-change detection. |
| 25 | PA3 | bidirectional | General purpose I/O PORTA pin 3 with TWI function, PTC X3/Y3, USART0 XDIR, TWI0 SCL (master), TCA0 WO3 and CCL LUT0 OUT functions. |
| 26 | PA4 | bidirectional | General purpose I/O PORTA pin 4, with PTC X4/Y4, USART0 TxD alternate, SPI0 MOSI, TCA0 WO4 and TCD0 WOA functions. |
| 27 | PA5 | bidirectional | General purpose I/O PORTA pin 5, with PTC X5/Y5, USART0 RxD alternate, SPI0 MISO, TCA0 WO5 and TCD0 WOB functions. |
| 28 | PA6 | bidirectional | General purpose I/O PORTA pin 6, with PTC X6/Y6, USART0 XCK alternate, SPI0 SCK, TCD0 WOC and CCL OUT alternate functions; has full asynchronous pin-change detection. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-28-300mil |
| Category | Embedded Processors & Controllers |
| Pins | 28 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VDD | 1.8 | 5.5 | V | Ordering table, AVR32DA28-E/SO | 569 | |
| Operating temperature range | -40 | 125 | °C | Extended (E) grade, AVR32DA28-E/SO | 569 | ||
| CPU operating frequency | 24 | MHz | AVR CPU running at up to 24 MHz | 1 | |||
| Maximum EXTCLK input frequency | 24 | MHz | External clock from pin | 88 | |||
| Maximum PLL output frequency | 48 | MHz | PLL reference clock at least 16 MHz | 88 |
CAD (KiCad official)
- Symbol:
AVR32DA28-E - Footprint:
Package_SO:SOIC-28W_7.5x17.9mm_P1.27mm - 3D model: SOIC-28-300mil (KiCad packages3D, STEP)
- 3D model files:
avr32da28-e-etched.step/avr32da28-e-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);avr32da28-e.step/avr32da28-e.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (595 pp, sha256
6ea4ba9c6d17c5e4, retrieved 2026-10-23, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).