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AVR128DB64T-E

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Microchip Tech Microcontroller Units (MCUs/MPUs/SOCs), QFN-64-EP(9x9). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Verified AVR128DB64T-E

by Ray · last 30 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

30 Oct 2026RayPublished by the parts factory: tier mfr, 65 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: AVR128DB64T-E · QFN-64-EP(9x9) · 65 pins
  • ✓copper: 65 copper pads, none touching another net
  • ✓datasheet: all 65 pin names found in the 660-page datasheet
  • •distributor (warn): no ['digikey', 'mouser'] number
  • ✓family: QFN-64-1EP_9x9mm_P0.5mm_EP6x6mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-9m68czq4/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • ✓package_fit: height within the datasheet's package drawing (datasheet p.651)
  • ✓pads: 65 pins = 65 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 65 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ avr128db64t-e.kicad_sym✓ avr128db64t-e.kicad_mod✓ avr128db64t-e.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
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docs Publish 0.1.0 · Ray 5d ago
viewers avr128db64t-e: viewers · Ray 5d ago
avr128db64t-e-etched.glb Publish 0.1.0 · Ray 5d ago
avr128db64t-e-etched.step avr128db64t-e: factory component page (tier=mfr) · Ray 5d ago
avr128db64t-e-hero.glb avr128db64t-e: hero GLB from the etched model (keeps the MPN mark) · Ray 5d ago
avr128db64t-e-hero.overlay.json Publish 0.1.0 · Ray 5d ago
avr128db64t-e.glb Publish 0.1.0 · Ray 5d ago
avr128db64t-e.kicad_mod Publish 0.1.0 · Ray 5d ago
avr128db64t-e.kicad_sym Publish 0.1.0 · Ray 5d ago
avr128db64t-e.lbr Publish 0.1.0 · Ray 5d ago
avr128db64t-e.step Publish 0.1.0 · Ray 5d ago
package.json Publish 0.1.0 · Ray 5d ago
page.json Set visibility: public · Ray 5d ago
README.md Publish 0.1.0 · Ray 5d ago
verification.json Verified: Published by the parts factory: tier mfr, 65 pins · Ray 5d ago

AVR128DB64T-E

Microchip Tech · Microcontroller Units (MCUs/MPUs/SOCs) · QFN-64-EP(9x9)

AVR128DB64T-E from Microchip Tech, in a QFN-64-EP(9x9). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PA3 bidirectional General-purpose I/O pin on the VDD domain; alternate functions include USART0 XDIR, TWI0 SCL (Fm+ capable), TCA0 WO3, and CCL LUT0 OUT.
2 PA4 bidirectional General-purpose I/O pin; alternate functions include USART0 TxD (alternate position), SPI0 MOSI, TCA0 WO4 and WOA.
3 PA5 bidirectional General-purpose I/O pin; alternate functions include USART0 RxD (alternate position), SPI0 MISO, TCA0 WO5 and WOB.
4 PA6 bidirectional General-purpose I/O pin; alternate functions include USART0 XCK (alternate position), SPI0 SCK, WOC and CCL LUT0 OUT (alternate position).
5 PA7 bidirectional General-purpose I/O pin; alternate functions include CLKOUT, SPI0 SS, WOD, EVSYS EVOUTA (alternate position), and the default ZCD0 to ZCD2 output position.
6 VDD power_in Main digital supply pin; the device operates from 1.8 V to 5.5 V per the ordering information.
7 GND power_in Ground reference pin for the digital supply and I/O.
8 PB0 bidirectional General-purpose I/O pin; alternate functions include USART3 TxD (alternate position), TCA0 WO0 (alternate position), TCB1 WO0 and CCL LUT4 IN0.
9 PB1 bidirectional General-purpose I/O pin; alternate functions include USART3 RxD (alternate position), TCA0 WO1 (alternate position), TCB1 WO1 and CCL LUT4 IN1.
10 PB2 bidirectional General-purpose I/O pin; alternate functions include TWI SDA (Fm+ capable), USART3 XCK (alternate position), TWI1 SDA master, EVSYS EVOUTB and CCL LUT4 IN2.
11 PB3 bidirectional General-purpose I/O pin; alternate functions include TWI SCL (Fm+ capable), USART3 XDIR (alternate position), TWI1 SCL master, TCA0 WO3 (alternate position) and CCL LUT4 OUT.
12 PB4 bidirectional General-purpose I/O pin; alternate functions include USART3 TxD (alternate position), SPI1 MOSI (alternate position), TCA0 WO4 (alternate position) and TCD0 WOA (alternate position).
13 PB5 bidirectional General-purpose I/O pin; alternate functions include USART3 RxD (alternate position), SPI1 MISO (alternate position), TCA0 WO5 (alternate position) and TCD0 WOB (alternate position).
14 PB6 bidirectional General-purpose I/O pin; alternate functions include USART3 XCK (alternate position), SPI1 SCK (alternate position), TWI1 SDA slave (alternate position), TCD0 WOC (alternate position) and CCL LUT4 OUT (alternate position).
15 PB7 bidirectional General-purpose I/O pin; alternate functions include USART3 XDIR (alternate position), SPI1 SS (alternate position), TWI1 SCL slave (alternate position), TCD0 WOD (alternate position) and EVSYS EVOUTB (alternate position).
16 PC0 bidirectional General-purpose I/O pin on the port C (MVIO) pads; alternate functions include USART1 TxD, SPI1 MOSI, TCA0 WO0 (alternate position), TCB2 WO and CCL LUT1 IN0.
17 PC1 bidirectional General-purpose I/O pin on the port C (MVIO) pads; alternate functions include USART1 RxD, SPI1 MISO, TCA0 WO1 (alternate position), TCB3 WO and CCL LUT1 IN1.
18 PC2 bidirectional General-purpose I/O pin; alternate functions include TWI SDA (Fm+ capable), USART1 XCK, SPI1 SCK, TWI0 SDA master (alternate position), TCA0 WO2 (alternate position), EVSYS EVOUTC and CCL LUT1 IN2.
19 PC3 bidirectional General-purpose I/O pin; alternate functions include TWI SCL (Fm+ capable), USART1 XDIR, SPI1 SS, TWI0 SCL master (alternate position), TCA0 WO3 (alternate position) and CCL LUT1 OUT.
20 VDDIO2 power_in Supply pin for the multi-voltage I/O (MVIO) pins; it must be connected to VDD in single-supply mode and may be a separate voltage in dual-supply mode.
21 GND power_in Ground reference pin for the digital supply and I/O.
22 PC4 bidirectional General-purpose I/O pin; alternate functions include USART1 TxD (alternate position), SPI1 MOSI (alternate position), TCA0 WO4 (alternate position) and TCB0 WO0 (alternate position).
23 PC5 bidirectional General-purpose I/O pin; alternate functions include USART1 RxD (alternate position), SPI1 MISO (alternate position), TCA0 WO5 (alternate position) and TCB0 WO1 (alternate position).
24 PC6 bidirectional General-purpose I/O pin; alternate functions include analog comparator AC0 to AC2 OUT (alternate position), USART1 XCK (alternate position), SPI1 SCK (alternate position), TWI0 SDA slave (alternate position), TCA0 WO2 (alternate position) and CCL LUT1 OUT (alternate position).
25 PC7 bidirectional General-purpose I/O pin; alternate functions include analog comparator AC0 to AC2 OUT (alternate position), USART1 XDIR (alternate position), SPI1 SS (alternate position), TWI0 SCL slave (alternate position) and EVSYS EVOUTC (alternate position); it is also the ZCD0 to ZCD2 output alternate position.
26 PD0 bidirectional General-purpose I/O pin and ADC0 analog input AIN0; alternate functions include analog comparator negative inputs (AINN1), TCA0 WO0 (alternate position) and CCL LUT2 IN0.
27 PD1 bidirectional General-purpose I/O pin and ADC0 analog input AIN1; alternate functions include OPAMP0 non-inverting input, ZCD0 ZCIN, TCA0 WO1 (alternate position) and CCL LUT2 IN1.
28 PD2 bidirectional General-purpose I/O pin and ADC0 analog input AIN2; alternate functions include analog comparator positive inputs (AINP0), OPAMP0 OUT, TCA0 WO2 (alternate position), EVSYS EVOUTD and CCL LUT2 IN2.
29 PD3 bidirectional General-purpose I/O pin and ADC0 analog input AIN3; alternate functions include OPAMP0 inverting input, TCA0 WO3 (alternate position) and CCL LUT2 OUT.
30 PD4 bidirectional General-purpose I/O pin and ADC0 analog input AIN4; alternate functions include OPAMP1 non-inverting input and TCA0 WO4 (alternate position).
31 PD5 bidirectional General-purpose I/O pin and ADC0 analog input AIN5; alternate functions include OPAMP1 OUT and TCA0 WO5 (alternate position).
32 PD6 bidirectional General-purpose I/O pin and ADC0 analog input AIN6; alternate functions include analog comparator positive inputs (AINP3), an output option and CCL LUT2 OUT (alternate position).
33 PD7 bidirectional General-purpose I/O pin and ADC0 analog input AIN7; it is also the external voltage reference pin VREFA and has OPAMP1 inverting input and EVSYS EVOUTD (alternate position) functions.
34 AVDD power_in Analog supply pin; the datasheet states AVDD is internally connected to VDD and is not a separate power domain.
35 AGND power_in Analog ground pin.
36 PE0 bidirectional General-purpose I/O pin and ADC0 analog input AIN8; alternate functions include USART4 TxD, SPI0 MOSI (alternate position) and TCA0 WO0 (alternate position).
37 PE1 bidirectional General-purpose I/O pin and ADC0 analog input AIN9; alternate functions include OPAMP2 non-inverting input, USART4 RxD, SPI0 MISO (alternate position) and TCA0 WO1 (alternate position).
38 PE2 bidirectional General-purpose I/O pin and ADC0 analog input AIN10; alternate functions include OPAMP2 OUT, USART4 XCK, SPI0 SCK (alternate position), TCA0 WO2 (alternate position) and EVSYS EVOUTE.
39 PE3 bidirectional General-purpose I/O pin and ADC0 analog input AIN11; alternate functions include OPAMP2 inverting input, ZCD1 ZCIN, USART4 XDIR, SPI0 SS (alternate position) and TCA0 WO3 (alternate position).
40 PE4 bidirectional General-purpose I/O pin and ADC0 analog input AIN12; alternate functions include USART4 TxD (alternate position), TCA1 WO0 (alternate position) and TCA0 WO4 (alternate position).
41 PE5 bidirectional General-purpose I/O pin and ADC0 analog input AIN13; alternate functions include USART4 RxD (alternate position), TCA1 WO1 (alternate position) and TCA0 WO5 (alternate position).
42 PE6 bidirectional General-purpose I/O pin and ADC0 analog input AIN14; alternate functions include USART4 XCK (alternate position) and TCA1 WO2 (alternate position).
43 PE7 bidirectional General-purpose I/O pin and ADC0 analog input AIN15; alternate functions include ZCD2 ZCIN, USART4 XDIR (alternate position) and EVSYS EVOUTE (alternate position).
44 PF0 (XTAL32K1) bidirectional General-purpose I/O pin and 32.768 kHz crystal oscillator pin XTAL32K1; also ADC0 analog input AIN16, which cannot be used as a negative differential input, plus USART2 TxD and CCL LUT3 IN0.
45 PF1 (XTAL32K2) bidirectional General-purpose I/O pin and 32.768 kHz crystal oscillator pin XTAL32K2; also ADC0 analog input AIN17, which cannot be used as a negative differential input, plus USART2 RxD and CCL LUT3 IN1.
46 PF2 bidirectional General-purpose I/O pin, ADC0 analog input AIN18 (not usable as negative differential input) and TWI SDA (Fm+ capable); also USART2 XCK, TCA0 WO2 (alternate position), EVSYS EVOUTF and CCL LUT3 IN2.
47 PF3 bidirectional General-purpose I/O pin, ADC0 analog input AIN19 (not usable as negative differential input) and TWI SCL (Fm+ capable); also USART2 XDIR, TCD0 WOD (alternate position) and CCL LUT3 OUT.
48 PF4 bidirectional General-purpose I/O pin and ADC0 analog input AIN20 (not usable as negative differential input); alternate functions include USART2 TxD (alternate position) and TCA0 WO4 (alternate position).
49 PF5 bidirectional General-purpose I/O pin and ADC0 analog input AIN21 (not usable as negative differential input); alternate functions include USART2 RxD (alternate position) and TCA0 WO5 (alternate position).
50 PF6 input Input-only pin (I/O note 6) that serves as the external RESET pin with pull-up enabled when the RSTPINCFG fuse selects RESET; the device stays in reset while it is low.
51 UPDI input Dedicated Unified Program and Debug Interface pin used for one-wire half-duplex UART programming and debugging, with no other function.
52 PG0 bidirectional General-purpose I/O pin; alternate functions include USART5 TxD, TCA0 WO0 (alternate position), TCA1 WO0 (alternate position) and CCL LUT5 IN0.
53 PG1 bidirectional General-purpose I/O pin; alternate functions include USART5 RxD, TCA0 WO1 (alternate position), TCA1 WO1 (alternate position) and CCL LUT5 IN1.
54 PG2 bidirectional General-purpose I/O pin; alternate functions include USART5 XCK, TCA0 WO2 (alternate position), TCA1 WO2 (alternate position) and EVSYS EVOUTG.
55 PG3 bidirectional General-purpose I/O pin; alternate functions include USART5 XDIR, TCA0 WO3 (alternate position), TCA1 WO3 (alternate position) and CCL LUT5 OUT.
56 VDD power_in Main digital supply pin; the device operates from 1.8 V to 5.5 V per the ordering information.
57 GND power_in Ground reference pin for the digital supply and I/O.
58 PG4 bidirectional General-purpose I/O pin; alternate functions include USART5 TxD (alternate position), SPI0 MOSI (alternate position), TCA0 WO4 (alternate position) and TCA0 WOA (alternate position).
59 PG5 bidirectional General-purpose I/O pin; alternate functions include USART5 RxD (alternate position), SPI0 MISO (alternate position), TCA0 WO5 (alternate position) and TCA0 WOB (alternate position).
60 PG6 bidirectional General-purpose I/O pin; alternate functions include USART5 XCK (alternate position), SPI0 SCK (alternate position), TCD0 WOC (alternate position) and CCL LUT5 OUT (alternate position).
61 PG7 bidirectional General-purpose I/O pin; alternate functions include USART5 XDIR (alternate position), SPI0 SS (alternate position), TCD0 WOD (alternate position) and EVSYS EVOUTG (alternate position).
62 PA0 (XTALHF1) bidirectional General-purpose I/O pin and high-frequency crystal pin XTALHF1; alternate functions include EXTCLK, USART0 TxD, TCA0 WO0 and CCL LUT0 IN0.
63 PA1 (XTALHF2) bidirectional General-purpose I/O pin and high-frequency crystal pin XTALHF2; alternate functions include USART0 RxD, TCA0 WO1 and CCL LUT0 IN1.
64 PA2 bidirectional General-purpose I/O pin; alternate functions include TWI SDA (Fm+ capable), USART0 XCK, TCA0 WO2, TWI0 SDA master, EVSYS EVOUTA and CCL LUT0 IN2.
65 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package QFN-64-EP(9x9)
Category Embedded Processors & Controllers
Pins 65

CAD (KiCad official)

  • Symbol: AVR128DB64T-E
  • Footprint: Package_DFN_QFN:QFN-64-1EP_9x9mm_P0.5mm_EP6x6mm
  • 3D model: QFN-64-EP(9x9) (KiCad packages3D, STEP)
  • 3D model files: avr128db64t-e-etched.step / avr128db64t-e-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); avr128db64t-e.step / avr128db64t-e.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (660 pp, sha256 9a87cbce668ce806, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF