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AVR128DA64-I

AVR1280DA64-I/PT · others · TQFP-64(10x10)

AVR128DA64-I from AVR1280DA64-I/PT, in a TQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PA3 bidirectional General-purpose I/O pin with alternate functions TWI0 SCL (host), USART0 XDIR, TCA0 WO3, PTC X3/Y3 and CCL LUT1 OUT.
2 PA4 bidirectional General-purpose I/O pin with alternate functions USART0 TxD, SPI0 MOSI, TCA0 WO4, PTC X4/Y4 and CCL LUT0 OUT.
3 PA5 bidirectional General-purpose I/O pin with alternate functions USART0 RxD, SPI0 MISO, TCA0 WO5, PTC X5/Y5 and CCL LUT0 OUT.
4 PA6 bidirectional General-purpose I/O pin with alternate functions USART0 XCK, SPI0 SCK, TCA0 WOC, PTC X6/Y6 and CCL LUT1 OUT.
5 PA7 bidirectional General-purpose I/O pin with alternate functions CLKOUT, USART0 XDIR, SPI0 SS, TCA0 WOD, EVSYS EVOUTA, PTC X7/Y7 and ZCD OUT.
6 VDD power_in Digital supply pin; all VDD pins are internally connected and the same voltage must be applied to each, with a decoupling capacitor on each supply pair.
7 GND power_in Ground pin; each supply pin pair (VDD or AVDD with its GND pin) requires its own decoupling capacitor.
8 PB0 bidirectional General-purpose I/O pin with alternate functions USART3 TxD, TCA0 WO0, PTC X8/Y8 and CCL LUT4 IN0.
9 PB1 bidirectional General-purpose I/O pin with alternate functions USART3 RxD, TCA0 WO1, PTC X9/Y9 and CCL LUT4 IN1.
10 PB2 bidirectional General-purpose I/O pin with alternate functions USART3 XCK, TWI1 SDA (host), TCA0 WO2, PTC X10/Y10, EVSYS EVOUTB and CCL LUT4 IN2.
11 PB3 bidirectional General-purpose I/O pin with alternate functions USART3 XDIR, TWI1 SCL (host), TCA0 WO3, PTC X11/Y11 and CCL LUT4 OUT.
12 PB4 bidirectional General-purpose I/O pin with alternate functions USART3 TxD, SPI0 MOSI, TCA0 WO4, PTC X12/Y12 and CCL LUT2 WO.
13 PB5 bidirectional General-purpose I/O pin with alternate functions USART3 RxD, SPI0 MISO, TCA0 WO5, PTC X13/Y13 and CCL LUT3 WO.
14 PB6 bidirectional General-purpose I/O pin with alternate functions USART3 XCK, SPI0 SCK, TWI1 SDA (client), TCA0 WOC and CCL LUT4 OUT.
15 PB7 bidirectional General-purpose I/O pin with alternate functions USART3 XDIR, SPI0 SS, TWI1 SCL (client), TCA0 WOD and EVSYS EVOUTB.
16 PC0 bidirectional General-purpose I/O pin with alternate functions USART1 TxD, SPI0 MOSI, TCA0 WO0, CCL LUT2 WO and CCL LUT1 IN0.
17 PC1 bidirectional General-purpose I/O pin with alternate functions USART1 RxD, SPI0 MISO, TCA0 WO1, TCA1 WO1 and CCL LUT1 IN1.
18 PC2 bidirectional General-purpose I/O pin with alternate functions TWI0 SDA (host), USART1 XCK, SPI0 SCK, TCA0 WO2, EVSYS EVOUTC and CCL LUT1 IN2.
19 PC3 bidirectional General-purpose I/O pin with alternate functions TWI0 SCL (host), USART1 XDIR, SPI0 SS, TCA0 WO3 and CCL LUT1 OUT.
20 VDD power_in Digital supply pin; all VDD pins are internally connected and the same voltage must be applied to each.
21 GND power_in Ground pin; each supply pin pair requires its own decoupling capacitor.
22 PC4 bidirectional General-purpose I/O pin with alternate functions USART1 TxD, SPI0 MOSI, TCA0 WO4 and TCA1 WO0.
23 PC5 bidirectional General-purpose I/O pin with alternate functions USART1 RxD, SPI0 MISO, TCA0 WO5 and TCA1 WO1.
24 PC6 bidirectional General-purpose I/O pin with alternate functions USART1 XCK, SPI0 SCK, TWI0 SDA (client), TCA0 WO2 and CCL LUT4 WO.
25 PC7 bidirectional General-purpose I/O pin with alternate functions USART1 XDIR, SPI0 SS, TWI0 SCL (client) and EVSYS EVOUTC.
26 PD0 bidirectional General-purpose I/O pin with alternate functions ADC0 AIN0 (analog input), PTC X16/Y16, AC0 AINN1, TCA0 WO0 and CCL LUT2 IN0.
27 PD1 bidirectional General-purpose I/O pin with alternate functions ADC0 AIN1 (analog input), PTC X17/Y17, AC0 ZCIN, TCA0 WO1 and CCL LUT2 IN1.
28 PD2 bidirectional General-purpose I/O pin with alternate functions ADC0 AIN2 (analog input), PTC X18/Y18, AC0 AINP0, TCA0 WO2, EVSYS EVOUTD and CCL LUT2 IN2.
29 PD3 bidirectional General-purpose I/O pin with alternate functions ADC0 AIN3 (analog input), PTC X19/Y19, AC0 AINN0, AC0 AINP1, TCA0 WO3 and CCL LUT2 OUT.
30 PD4 bidirectional General-purpose I/O pin with alternate functions ADC0 AIN4 (analog input), PTC X20/Y20, AC1 AINP2, AC1 AINP1, and TCA0 WO4.
31 PD5 bidirectional General-purpose I/O pin with alternate functions ADC0 AIN5 (analog input), PTC X21/Y21, AC1 AINN0 and TCA0 WO5.
32 PD6 bidirectional General-purpose I/O pin with alternate functions ADC0 AIN6 (analog input), PTC X22/Y22, AC2 AINP3, DAC0 VOUT and CCL LUT3 OUT.
33 PD7 bidirectional General-purpose I/O pin with alternate functions VREF external reference input VREFA, ADC0 AIN7 (analog input), PTC X23/Y23, AC2 AINN2, and EVSYS EVOUTD.
34 AVDD power_in Analog supply pin for the analog peripherals; AVDD and VDD are internally connected in this device family and the same voltage must be applied.
35 GND power_in Ground pin for the device; each supply pin pair requires its own decoupling capacitor.
36 PE0 bidirectional General-purpose I/O pin with alternate functions ADC0 AIN8 (analog input), PTC X24/Y24, AC1 AINP1, USART4 TxD, SPI0 MOSI and TCA0 WO0.
37 PE1 bidirectional General-purpose I/O pin with alternate functions ADC0 AIN9 (analog input), PTC X25/Y25, AC1 AINP2, USART4 RxD, SPI0 MISO and TCA0 WO1.
38 PE2 bidirectional General-purpose I/O pin with alternate functions ADC0 AIN10 (analog input), PTC X26/Y26, AC1 AINP2, USART4 XCK, SPI0 SCK, TCA0 WO2 and EVSYS EVOUTE.
39 PE3 bidirectional General-purpose I/O pin with alternate functions ADC0 AIN11 (analog input), PTC X27/Y27, AC1 ZCIN, USART4 XDIR, SPI0 SS and TCA0 WO3.
40 PE4 bidirectional General-purpose I/O pin with alternate functions ADC0 AIN12 (analog input), PTC X28/Y28, USART4 TxD, TCA0 WO4 and TCA0 WO0.
41 PE5 bidirectional General-purpose I/O pin with alternate functions ADC0 AIN13 (analog input), PTC X29/Y29, USART4 RxD, TCA0 WO5 and TCA0 WO1.
42 PE6 bidirectional General-purpose I/O pin with alternate functions ADC0 AIN14 (analog input), PTC X30/Y30, USART4 XCK and TCA0 WO2.
43 PE7 bidirectional General-purpose I/O pin with alternate functions ADC0 AIN15 (analog input), PTC X31/Y31, AC2 ZCIN, USART4 XDIR and EVSYS EVOUTE.
44 PF0 bidirectional General-purpose I/O pin, also the 32.768 kHz crystal oscillator pin XTAL32K1 and positive analog input AIN16 (input-only for the analog function), with alternate functions USART2 TxD and TCA0 WOA.
45 PF1 bidirectional General-purpose I/O pin, also the 32.768 kHz crystal oscillator pin XTAL32K2 and positive analog input AIN17 (input-only for the analog function), with alternate functions USART2 RxD and TCA0 WOB.
46 PF2 bidirectional General-purpose I/O pin with alternate functions ADC0 AIN18 (positive analog input), PTC X34/Y34, TWI0 SDA (host), USART2 XCK, TCA0 WOC and EVSYS EVOUTF.
47 PF3 bidirectional General-purpose I/O pin with alternate functions ADC0 AIN19 (positive analog input), PTC X35/Y35, TWI0 SCL (host), USART2 XDIR and TCA0 WOD.
48 PF4 bidirectional General-purpose I/O pin with alternate functions ADC0 AIN20 (positive analog input), PTC X36/Y36, USART2 TxD and TCA0 WO.
49 PF5 bidirectional General-purpose I/O pin with alternate functions ADC0 AIN21 (positive analog input), PTC X37/Y37, USART2 RxD and TCA1 WO.
50 PF6 input Input-only pin that is the RESET pin (active-low external reset) when RSTPINCFG is set to RESET, otherwise a general input pin.
51 UPDI bidirectional Dedicated Unified Program and Debug Interface pin, using one-wire asynchronous half-duplex UART communication.
52 PG0 bidirectional General-purpose I/O pin with alternate functions PTC X40/Y40, USART5 TxD, TCA0 WO0 and CCL LUT5 IN0.
53 PG1 bidirectional General-purpose I/O pin with alternate functions PTC X41/Y41, USART5 RxD, TCA0 WO1 and CCL LUT5 IN1.
54 PG2 bidirectional General-purpose I/O pin with alternate functions PTC X42/Y42, USART5 XCK, TCA0 WO2, EVSYS EVOUTG and CCL LUT5 IN2.
55 PG3 bidirectional General-purpose I/O pin with alternate functions PTC X43/Y43, USART5 XDIR, TCA0 WO3 and CCL LUT5 OUT.
56 VDD power_in Digital supply pin; all VDD pins are internally connected and the same voltage must be applied to each.
57 GND power_in Ground pin; each supply pin pair requires its own decoupling capacitor.
58 PG4 bidirectional General-purpose I/O pin with alternate functions PTC X44/Y44, USART5 TxD, SPI0 MOSI, TCA0 WO4 and TCA0 WOA.
59 PG5 bidirectional General-purpose I/O pin with alternate functions PTC X45/Y45, USART5 RxD, SPI0 MISO, TCA0 WO5 and TCA0 WOB.
60 PG6 bidirectional General-purpose I/O pin with alternate functions PTC X46/Y46, USART5 XCK, SPI0 SCK, TCA0 WOC and CCL LUT5 OUT.
61 PG7 bidirectional General-purpose I/O pin with alternate functions PTC X47/Y47, USART5 XDIR, SPI0 SS, TCA0 WOD and EVSYS EVOUTG.
62 PA0 bidirectional General-purpose I/O pin with alternate functions EXTCLK (external clock), PTC X0/Y0, USART0 TxD, TCA0 WO0 and CCL LUT0 IN0.
63 PA1 bidirectional General-purpose I/O pin with alternate functions PTC X1/Y1, USART0 RxD, TCA0 WO1 and CCL LUT0 IN1.
64 PA2 bidirectional General-purpose I/O pin with alternate functions TWI0 SDA (host), PTC X2/Y2, USART0 XCK, TCA0 WO2, EVSYS EVOUTA and CCL LUT0 IN2.

Key specifications

Parameter Value
Manufacturer AVR1280DA64-I/PT
Package TQFP-64(10x10)
Category others
Pins 64

CAD (KiCad official)

  • Symbol: AVR128DA64-I
  • Footprint: Package_QFP:TQFP-64_10x10mm_P0.5mm
  • 3D model: TQFP-64(10x10) (KiCad packages3D, STEP)
  • 3D model files: avr128da64-i-etched.step / avr128da64-i-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); avr128da64-i.step / avr128da64-i.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: AVR1280DA64-I/PT datasheet (684 pp, sha256 6aff7827cea3b091, retrieved 2026-11-02, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF