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AVR128DA48-I/PT
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Microchip Tech Pre-ordered MCUs, TQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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AVR128DA48-I
Microchip Tech · Pre-ordered MCUs · TQFP-48(7x7)
AVR128DA48-I from Microchip Tech, in a TQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model). Symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PA5 | bidirectional | PORTA pin 5 general-purpose I/O, with ADC0 X5/Y5, USART0 RxD (alternate position), SPI0 MISO and TCA0 WO5 functions. |
| 2 | PA6 | bidirectional | PORTA pin 6 general-purpose I/O, with ADC0 X6/Y6, USART0 XCK (alternate position), SPI0 SCK and TCA0 WOC functions. |
| 3 | PA7 | bidirectional | PORTA pin 7 general-purpose I/O, with CLKOUT, ADC0 X7/Y7, USART0 XDIR (alternate position), SPI0 SS and ZCD outputs (default ZCD output position). |
| 4 | PB0 | bidirectional | PORTB pin 0 general-purpose I/O, with ADC0 X8/Y8, USART3 TxD (alternate position) and TCA0 WO0 (alternate position) functions. |
| 5 | PB1 | bidirectional | PORTB pin 1 general-purpose I/O, with ADC0 X9/Y9, USART3 RxD (alternate position) and TCA0 WO1 (alternate position) functions. |
| 6 | PB2 | bidirectional | PORTB pin 2 general-purpose I/O, with ADC0 X10/Y10, USART3 XCK (alternate position), TWI0 SDA (alternate position) and EVSYS EVOUTB functions. |
| 7 | PB3 | bidirectional | PORTB pin 3 general-purpose I/O, with ADC0 X11/Y11, USART3 XDIR (alternate position), TWI0 SCL (alternate position) and TCA0 WO3 (alternate position) functions. |
| 8 | PB4 | bidirectional | PORTB pin 4 general-purpose I/O, with ADC0 X12/Y12, USART3 TxD and SPI0 MOSI (alternate positions) and TCA0 WO4 (alternate position) functions. |
| 9 | PB5 | bidirectional | PORTB pin 5 general-purpose I/O, with ADC0 X13/Y13, USART3 RxD and SPI0 MISO (alternate positions) and TCA0 WO5 (alternate position) functions. |
| 10 | PC0 | bidirectional | PORTC pin 0 general-purpose I/O, with USART1 TxD, SPI0 MOSI (alternate position), TCA0 WO0 (alternate position) and CCL LUT1 input functions. |
| 11 | PC1 | bidirectional | PORTC pin 1 general-purpose I/O, with USART1 RxD, SPI0 MISO (alternate position), TCA0 WO1 (alternate position) and CCL LUT1 input functions. |
| 12 | PC2 | bidirectional | PORTC pin 2 general-purpose I/O, with TWI0 SDA (alternate position), USART1 XCK, SPI0 SCK (alternate position), TCA0 WO2 (alternate position) and EVSYS EVOUTC functions. |
| 13 | PC3 | bidirectional | PORTC pin 3 general-purpose I/O, with TWI0 SCL (alternate position), USART1 XDIR, SPI0 SS (alternate position), TCA0 WO3 (alternate position) and CCL LUT1 OUT functions. |
| 14 | VDD | power_in | Digital supply voltage; all VDD pins are internally connected and must be at the same voltage, with decoupling placed close to each VDD/GND pair. |
| 15 | GND | power_in | Ground reference for the digital supply. |
| 16 | PC4 | bidirectional | PORTC pin 4 general-purpose I/O, with USART1 TxD and SPI0 MOSI (alternate positions) and TCA0 WO4/WO0 (alternate positions) functions. |
| 17 | PC5 | bidirectional | PORTC pin 5 general-purpose I/O, with USART1 RxD and SPI0 MISO (alternate positions) and TCA0 WO5/WO1 (alternate positions) functions. |
| 18 | PC6 | bidirectional | PORTC pin 6 general-purpose I/O, with USART1 XCK and SPI0 SCK (alternate positions), TWI0 SDA (client) and TCA0 WO2 (alternate position) functions. |
| 19 | PC7 | bidirectional | PORTC pin 7 general-purpose I/O, with USART1 XDIR and SPI0 SS (alternate positions), TWI0 SCL (client) and EVSYS EVOUTC (alternate position) functions. |
| 20 | PD0 | bidirectional | PORTD pin 0 general-purpose I/O, with ADC0 AIN0 input, analog comparator AC0 input (AINN1/AINN1 options) and TCA0 WO0 (alternate position) functions. |
| 21 | PD1 | bidirectional | PORTD pin 1 general-purpose I/O, with ADC0 AIN1 input, the AC0 ZCIN input and TCA0 WO1 (alternate position) functions. |
| 22 | PD2 | bidirectional | PORTD pin 2 general-purpose I/O, with ADC0 AIN2 input, analog comparator AC0 AINP0 input, TCA0 WO2 (alternate position) and EVSYS EVOUTD functions. |
| 23 | PD3 | bidirectional | PORTD pin 3 general-purpose I/O, with ADC0 AIN3 input, analog comparator AC0 AINN0/AINP1 inputs and TCA0 WO3 (alternate position) functions. |
| 24 | PD4 | bidirectional | PORTD pin 4 general-purpose I/O, with ADC0 AIN4 input, analog comparator AINP2/AINP1 inputs and TCA0 WO4 (alternate position) functions. |
| 25 | PD5 | bidirectional | PORTD pin 5 general-purpose I/O, with ADC0 AIN5 input, analog comparator AINN0 input and TCA0 WO5 (alternate position) functions. |
| 26 | PD6 | bidirectional | PORTD pin 6 general-purpose I/O, with ADC0 AIN6 input, analog comparator AINP3 input, DAC0 VOUT output and CCL LUT2 OUT (alternate position) functions. |
| 27 | PD7 | bidirectional | PORTD pin 7 general-purpose I/O, with VREF external reference input VREFA, ADC0 AIN7 input, analog comparator AINN2 input and EVSYS EVOUTD (alternate position) functions. |
| 28 | AVDD | power_in | Analog supply pin; VDD and AVDD are internally connected on this device family (no separate power domains). |
| 29 | GND | power_in | Ground reference pin. |
| 30 | PE0 | bidirectional | PORTE pin 0 general-purpose I/O, with ADC0 AIN8 input, USART4 TxD, SPI0 MOSI (alternate position) and TCA0 WO0 (alternate position) functions. |
| 31 | PE1 | bidirectional | PORTE pin 1 general-purpose I/O, with ADC0 AIN9 input, USART4 RxD, SPI0 MISO (alternate position) and TCA0 WO1 (alternate position) functions. |
| 32 | PE2 | bidirectional | PORTE pin 2 general-purpose I/O, with ADC0 AIN10 input, USART4 XCK, SPI0 SCK (alternate position), TCA0 WO2 (alternate position) and EVSYS EVOUTE functions. |
| 33 | PE3 | bidirectional | PORTE pin 3 general-purpose I/O, with ADC0 AIN11 input, analog comparator ZCIN input, USART4 XDIR and SPI0 SS (alternate position) functions. |
| 34 | PF0 (XTAL32K1) | bidirectional | PORTF pin 0 general-purpose I/O, which is also the 32.768 kHz crystal oscillator XTAL32K1 connection, with ADC0 AIN16 positive input and USART2 TxD functions. |
| 35 | PF1 (XTAL32K2) | bidirectional | PORTF pin 1 general-purpose I/O, which is also the 32.768 kHz crystal oscillator XTAL32K2 connection, with ADC0 AIN17 positive input and USART2 RxD functions. |
| 36 | PF2 | bidirectional | PORTF pin 2 general-purpose I/O, with ADC0 AIN18 positive input, USART2 XCK, TWI0 SDA (alternate position) and EVSYS EVOUTF functions. |
| 37 | PF3 | bidirectional | PORTF pin 3 general-purpose I/O, with ADC0 AIN19 positive input, USART2 XDIR, TWI0 SCL (alternate position) and TCA0 WO3 (alternate position) functions. |
| 38 | PF4 | bidirectional | PORTF pin 4 general-purpose I/O, with ADC0 AIN20 positive input, USART2 TxD (alternate position) and TCA0 WO4 (alternate position) functions. |
| 39 | PF5 | bidirectional | PORTF pin 5 general-purpose I/O, with ADC0 AIN21 positive input, USART2 RxD (alternate position) and TCA0 WO5 (alternate position) functions. |
| 40 | PF6 (RESET) | input | Input-only pin PF6; it is a general input by default and becomes the external RESET pin only when the RSTPINCFG fuse enables External Reset on PF6, with a noise filter on the reset input. |
| 41 | UPDI | bidirectional | Dedicated Unified Program and Debug Interface pin for one-wire asynchronous UART programming and debugging, with no other function. |
| 42 | VDD | power_in | Digital supply voltage; all VDD pins are internally connected and must be at the same voltage. |
| 43 | GND | power_in | Ground reference pin. |
| 44 | PA0 (EXTCLK) | bidirectional | PORTA pin 0 general-purpose I/O, which can also be the EXTCLK external clock input, with ADC0 X0/Y0, USART0 TxD (alternate position), TCA0 WO0 and CCL LUT0 input functions. |
| 45 | PA1 | bidirectional | PORTA pin 1 general-purpose I/O, with ADC0 X1/Y1, USART0 RxD (alternate position), TCA0 WO1 and CCL LUT0 input functions. |
| 46 | PA2 | bidirectional | PORTA pin 2 general-purpose I/O, with ADC0 X2/Y2, USART0 XCK, TWI0 SDA (host), TCA0 WO2, EVSYS EVOUTA and CCL LUT0 input functions. |
| 47 | PA3 | bidirectional | PORTA pin 3 general-purpose I/O, with ADC0 X3/Y3, USART0 XDIR, TWI0 SCL (host), TCA1 WO3 and CCL LUT1 OUT functions. |
| 48 | PA4 | bidirectional | PORTA pin 4 general-purpose I/O, with ADC0 X4/Y4, USART0 TxD (alternate position), SPI0 MOSI and TCA0 WO4 functions. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | TQFP-48(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 48 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | 1.8 | 5.5 | V | Table 39-1 ordering entry AVR128DA48-I/PT (TQFP-48, -40 C to +85 C) | 649 | ||
| Operating Temperature Range (Industrial) | -40 | 85 | °C | Table 39-1 ordering entry AVR128DA48-I/PT (Industrial, -I suffix) | 649 | ||
| Max. Frequency (48-pin column) | 24 | MHz | Table 2 Peripheral Overview, 48-pin AVR128DA48(S) column | 2 | |||
| BOD threshold BODLEVEL0 | LVL | 1.9 | V | Typical value, BOD Control B register (LVL=0x0); refer to Electrical Characteristics for limits | 200 | ||
| BOD threshold BODLEVEL1 | LVL | 2.45 | V | Typical value, BOD Control B register (LVL=0x1); refer to Electrical Characteristics for limits | 200 | ||
| BOD threshold BODLEVEL2 | LVL | 2.7 | V | Typical value, BOD Control B register (LVL=0x2); refer to Electrical Characteristics for limits | 200 | ||
| BOD threshold BODLEVEL3 | LVL | 2.85 | V | Typical value, BOD Control B register (LVL=0x3); refer to Electrical Characteristics for limits | 200 |
CAD (KiCad official)
- Symbol:
AVR128DA48-I - Footprint:
Package_QFP:TQFP-48_7x7mm_P0.5mm - 3D model: TQFP-48(7x7) (KiCad packages3D, STEP)
- 3D model files:
avr128da48-i-pt-etched.step/avr128da48-i-pt-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);avr128da48-i-pt.step/avr128da48-i-pt.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (700 pp, sha256
0001076aa7fb795a, retrieved 2026-11-13, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# AVR128DA48-I
**Microchip Tech** · Pre-ordered MCUs · TQFP-48(7x7)
AVR128DA48-I from Microchip Tech, in a TQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model). Symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PA5 | bidirectional | PORTA pin 5 general-purpose I/O, with ADC0 X5/Y5, USART0 RxD (alternate position), SPI0 MISO and TCA0 WO5 functions. |
| 2 | PA6 | bidirectional | PORTA pin 6 general-purpose I/O, with ADC0 X6/Y6, USART0 XCK (alternate position), SPI0 SCK and TCA0 WOC functions. |
| 3 | PA7 | bidirectional | PORTA pin 7 general-purpose I/O, with CLKOUT, ADC0 X7/Y7, USART0 XDIR (alternate position), SPI0 SS and ZCD outputs (default ZCD output position). |
| 4 | PB0 | bidirectional | PORTB pin 0 general-purpose I/O, with ADC0 X8/Y8, USART3 TxD (alternate position) and TCA0 WO0 (alternate position) functions. |
| 5 | PB1 | bidirectional | PORTB pin 1 general-purpose I/O, with ADC0 X9/Y9, USART3 RxD (alternate position) and TCA0 WO1 (alternate position) functions. |
| 6 | PB2 | bidirectional | PORTB pin 2 general-purpose I/O, with ADC0 X10/Y10, USART3 XCK (alternate position), TWI0 SDA (alternate position) and EVSYS EVOUTB functions. |
| 7 | PB3 | bidirectional | PORTB pin 3 general-purpose I/O, with ADC0 X11/Y11, USART3 XDIR (alternate position), TWI0 SCL (alternate position) and TCA0 WO3 (alternate position) functions. |
| 8 | PB4 | bidirectional | PORTB pin 4 general-purpose I/O, with ADC0 X12/Y12, USART3 TxD and SPI0 MOSI (alternate positions) and TCA0 WO4 (alternate position) functions. |
| 9 | PB5 | bidirectional | PORTB pin 5 general-purpose I/O, with ADC0 X13/Y13, USART3 RxD and SPI0 MISO (alternate positions) and TCA0 WO5 (alternate position) functions. |
| 10 | PC0 | bidirectional | PORTC pin 0 general-purpose I/O, with USART1 TxD, SPI0 MOSI (alternate position), TCA0 WO0 (alternate position) and CCL LUT1 input functions. |
| 11 | PC1 | bidirectional | PORTC pin 1 general-purpose I/O, with USART1 RxD, SPI0 MISO (alternate position), TCA0 WO1 (alternate position) and CCL LUT1 input functions. |
| 12 | PC2 | bidirectional | PORTC pin 2 general-purpose I/O, with TWI0 SDA (alternate position), USART1 XCK, SPI0 SCK (alternate position), TCA0 WO2 (alternate position) and EVSYS EVOUTC functions. |
| 13 | PC3 | bidirectional | PORTC pin 3 general-purpose I/O, with TWI0 SCL (alternate position), USART1 XDIR, SPI0 SS (alternate position), TCA0 WO3 (alternate position) and CCL LUT1 OUT functions. |
| 14 | VDD | power_in | Digital supply voltage; all VDD pins are internally connected and must be at the same voltage, with decoupling placed close to each VDD/GND pair. |
| 15 | GND | power_in | Ground reference for the digital supply. |
| 16 | PC4 | bidirectional | PORTC pin 4 general-purpose I/O, with USART1 TxD and SPI0 MOSI (alternate positions) and TCA0 WO4/WO0 (alternate positions) functions. |
| 17 | PC5 | bidirectional | PORTC pin 5 general-purpose I/O, with USART1 RxD and SPI0 MISO (alternate positions) and TCA0 WO5/WO1 (alternate positions) functions. |
| 18 | PC6 | bidirectional | PORTC pin 6 general-purpose I/O, with USART1 XCK and SPI0 SCK (alternate positions), TWI0 SDA (client) and TCA0 WO2 (alternate position) functions. |
| 19 | PC7 | bidirectional | PORTC pin 7 general-purpose I/O, with USART1 XDIR and SPI0 SS (alternate positions), TWI0 SCL (client) and EVSYS EVOUTC (alternate position) functions. |
| 20 | PD0 | bidirectional | PORTD pin 0 general-purpose I/O, with ADC0 AIN0 input, analog comparator AC0 input (AINN1/AINN1 options) and TCA0 WO0 (alternate position) functions. |
| 21 | PD1 | bidirectional | PORTD pin 1 general-purpose I/O, with ADC0 AIN1 input, the AC0 ZCIN input and TCA0 WO1 (alternate position) functions. |
| 22 | PD2 | bidirectional | PORTD pin 2 general-purpose I/O, with ADC0 AIN2 input, analog comparator AC0 AINP0 input, TCA0 WO2 (alternate position) and EVSYS EVOUTD functions. |
| 23 | PD3 | bidirectional | PORTD pin 3 general-purpose I/O, with ADC0 AIN3 input, analog comparator AC0 AINN0/AINP1 inputs and TCA0 WO3 (alternate position) functions. |
| 24 | PD4 | bidirectional | PORTD pin 4 general-purpose I/O, with ADC0 AIN4 input, analog comparator AINP2/AINP1 inputs and TCA0 WO4 (alternate position) functions. |
| 25 | PD5 | bidirectional | PORTD pin 5 general-purpose I/O, with ADC0 AIN5 input, analog comparator AINN0 input and TCA0 WO5 (alternate position) functions. |
| 26 | PD6 | bidirectional | PORTD pin 6 general-purpose I/O, with ADC0 AIN6 input, analog comparator AINP3 input, DAC0 VOUT output and CCL LUT2 OUT (alternate position) functions. |
| 27 | PD7 | bidirectional | PORTD pin 7 general-purpose I/O, with VREF external reference input VREFA, ADC0 AIN7 input, analog comparator AINN2 input and EVSYS EVOUTD (alternate position) functions. |
| 28 | AVDD | power_in | Analog supply pin; VDD and AVDD are internally connected on this device family (no separate power domains). |
| 29 | GND | power_in | Ground reference pin. |
| 30 | PE0 | bidirectional | PORTE pin 0 general-purpose I/O, with ADC0 AIN8 input, USART4 TxD, SPI0 MOSI (alternate position) and TCA0 WO0 (alternate position) functions. |
| 31 | PE1 | bidirectional | PORTE pin 1 general-purpose I/O, with ADC0 AIN9 input, USART4 RxD, SPI0 MISO (alternate position) and TCA0 WO1 (alternate position) functions. |
| 32 | PE2 | bidirectional | PORTE pin 2 general-purpose I/O, with ADC0 AIN10 input, USART4 XCK, SPI0 SCK (alternate position), TCA0 WO2 (alternate position) and EVSYS EVOUTE functions. |
| 33 | PE3 | bidirectional | PORTE pin 3 general-purpose I/O, with ADC0 AIN11 input, analog comparator ZCIN input, USART4 XDIR and SPI0 SS (alternate position) functions. |
| 34 | PF0 (XTAL32K1) | bidirectional | PORTF pin 0 general-purpose I/O, which is also the 32.768 kHz crystal oscillator XTAL32K1 connection, with ADC0 AIN16 positive input and USART2 TxD functions. |
| 35 | PF1 (XTAL32K2) | bidirectional | PORTF pin 1 general-purpose I/O, which is also the 32.768 kHz crystal oscillator XTAL32K2 connection, with ADC0 AIN17 positive input and USART2 RxD functions. |
| 36 | PF2 | bidirectional | PORTF pin 2 general-purpose I/O, with ADC0 AIN18 positive input, USART2 XCK, TWI0 SDA (alternate position) and EVSYS EVOUTF functions. |
| 37 | PF3 | bidirectional | PORTF pin 3 general-purpose I/O, with ADC0 AIN19 positive input, USART2 XDIR, TWI0 SCL (alternate position) and TCA0 WO3 (alternate position) functions. |
| 38 | PF4 | bidirectional | PORTF pin 4 general-purpose I/O, with ADC0 AIN20 positive input, USART2 TxD (alternate position) and TCA0 WO4 (alternate position) functions. |
| 39 | PF5 | bidirectional | PORTF pin 5 general-purpose I/O, with ADC0 AIN21 positive input, USART2 RxD (alternate position) and TCA0 WO5 (alternate position) functions. |
| 40 | PF6 (RESET) | input | Input-only pin PF6; it is a general input by default and becomes the external RESET pin only when the RSTPINCFG fuse enables External Reset on PF6, with a noise filter on the reset input. |
| 41 | UPDI | bidirectional | Dedicated Unified Program and Debug Interface pin for one-wire asynchronous UART programming and debugging, with no other function. |
| 42 | VDD | power_in | Digital supply voltage; all VDD pins are internally connected and must be at the same voltage. |
| 43 | GND | power_in | Ground reference pin. |
| 44 | PA0 (EXTCLK) | bidirectional | PORTA pin 0 general-purpose I/O, which can also be the EXTCLK external clock input, with ADC0 X0/Y0, USART0 TxD (alternate position), TCA0 WO0 and CCL LUT0 input functions. |
| 45 | PA1 | bidirectional | PORTA pin 1 general-purpose I/O, with ADC0 X1/Y1, USART0 RxD (alternate position), TCA0 WO1 and CCL LUT0 input functions. |
| 46 | PA2 | bidirectional | PORTA pin 2 general-purpose I/O, with ADC0 X2/Y2, USART0 XCK, TWI0 SDA (host), TCA0 WO2, EVSYS EVOUTA and CCL LUT0 input functions. |
| 47 | PA3 | bidirectional | PORTA pin 3 general-purpose I/O, with ADC0 X3/Y3, USART0 XDIR, TWI0 SCL (host), TCA1 WO3 and CCL LUT1 OUT functions. |
| 48 | PA4 | bidirectional | PORTA pin 4 general-purpose I/O, with ADC0 X4/Y4, USART0 TxD (alternate position), SPI0 MOSI and TCA0 WO4 functions. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | TQFP-48(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 48 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | | 1.8 | | 5.5 | V | Table 39-1 ordering entry AVR128DA48-I/PT (TQFP-48, -40 C to +85 C) | 649 |
| Operating Temperature Range (Industrial) | | -40 | | 85 | °C | Table 39-1 ordering entry AVR128DA48-I/PT (Industrial, -I suffix) | 649 |
| Max. Frequency (48-pin column) | | | | 24 | MHz | Table 2 Peripheral Overview, 48-pin AVR128DA48(S) column | 2 |
| BOD threshold BODLEVEL0 | LVL | | 1.9 | | V | Typical value, BOD Control B register (LVL=0x0); refer to Electrical Characteristics for limits | 200 |
| BOD threshold BODLEVEL1 | LVL | | 2.45 | | V | Typical value, BOD Control B register (LVL=0x1); refer to Electrical Characteristics for limits | 200 |
| BOD threshold BODLEVEL2 | LVL | | 2.7 | | V | Typical value, BOD Control B register (LVL=0x2); refer to Electrical Characteristics for limits | 200 |
| BOD threshold BODLEVEL3 | LVL | | 2.85 | | V | Typical value, BOD Control B register (LVL=0x3); refer to Electrical Characteristics for limits | 200 |
## CAD (KiCad official)
- Symbol: `AVR128DA48-I`
- Footprint: `Package_QFP:TQFP-48_7x7mm_P0.5mm`
- 3D model: TQFP-48(7x7) (KiCad packages3D, STEP)
- 3D model files: `avr128da48-i-pt-etched.step` / `avr128da48-i-pt-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `avr128da48-i-pt.step` / `avr128da48-i-pt.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Microchip Tech datasheet](https://ww1.microchip.com/downloads/aemDocuments/documents/MCU08/ProductDocuments/DataSheets/AVR128DA28-32-48-64-Data-Sheet-DS40002183.pdf) (700 pp, sha256 `0001076aa7fb795a`, retrieved 2026-11-13, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/avr128da48-i-pt-datasheet.pdf)