SN74AUP1G08

{
  "schema_version": 1,
  "type": "component",
  "slug": "aup1g08",
  "title": "SN74AUP1G08",
  "brief": "TI single 2-input AND gate, SC70-5. Ultra-low-power AUP family, 0.8-3.6 V. Datasheet-verified.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "logic",
    "and-gate",
    "single-gate",
    "low-power",
    "sc70-5",
    "texas-instruments"
  ],
  "component": {
    "mpn": "SN74AUP1G08",
    "manufacturer": "Texas Instruments",
    "package": "SC70-5",
    "pin_count": 5,
    "category": "Logic",
    "subcategory": "Single AND gate",
    "datasheet": "https://www.ti.com/lit/ds/symlink/sn74aup1g08.pdf",
    "parts": {
      "symbol": "aup1g08.kicad_sym",
      "footprint": "aup1g08.kicad_mod",
      "model_3d": "aup1g08-etched.glb",
      "model_3d_plain": "aup1g08.glb",
      "model_3d_step": "aup1g08-etched.step",
      "model_3d_step_plain": "aup1g08.step",
      "lbr": "aup1g08.lbr"
    },
    "distributor_links": {},
    "pins": [
      {
        "number": "1",
        "name": "A",
        "type": "input",
        "description": "Logic input A. Schmitt-trigger CMOS input (Vhys = 250 mV typ at 3.3V). 3.6V-tolerant regardless of VCC."
      },
      {
        "number": "2",
        "name": "B",
        "type": "input",
        "description": "Logic input B. Schmitt-trigger CMOS input (Vhys = 250 mV typ at 3.3V). 3.6V-tolerant regardless of VCC."
      },
      {
        "number": "3",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference (0 V). Connect to system ground with a low-inductance path."
      },
      {
        "number": "4",
        "name": "Y",
        "type": "output",
        "description": "Logic output Y = A · B (positive-AND). Push-pull CMOS output; tpd = 4.3 ns max at 3.3V."
      },
      {
        "number": "5",
        "name": "VCC",
        "type": "power_in",
        "description": "Positive supply, 0.8 V to 3.6 V. Bypass locally with a 0.1 µF ceramic capacitor to GND."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://www.ti.com/lit/ds/symlink/sn74aup1g08.pdf",
        "pages": 54,
        "sha256": "bf6005a9e1d88684",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 5,
        "described": 5,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "aup1g08.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          2.1,
          2.0,
          1.1
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "2860de5b7b085919ff6e952148353f928798588d9f544dc69430545aff2ba908",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "aup1g08-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          2.1,
          2.0,
          1.1
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "a61a22fa6b868fc17aaa9983f6b0933c806958f479afcbeb20dee74f256173c8",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Type": "Single 2-input AND gate",
      "Family": "AUP (ultra-low-power)",
      "Supply": "0.8-3.6 V",
      "Static current": "< 1 uA",
      "Inputs": "A, B",
      "Output": "Y",
      "Package": "SC70-5"
    }
  },
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "sn74aup1g08",
    "single and gate",
    "2 input and gate",
    "low power logic gate"
  ],
  "discovery_pitch": "TI SN74AUP1G08 single 2-input AND gate (SC70-5) with datasheet-verified pinout, KiCad symbol/footprint/3D, and full provenance.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "aup1g08.kicad_sym",
    "aup1g08.kicad_mod",
    "aup1g08.glb",
    "aup1g08.step",
    "aup1g08.lbr",
    "docs/hero.png",
    "docs/aup1g08-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "aup1g08-etched.step"
  ],
  "visibility": {
    "public": true
  }
}