component
AUIRS2301STR
Public Made by Adomby adom
Infineon Technologies Gate Drive ICs, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownAUIRS2301STR
Infineon Technologies · Gate Drive ICs · SOIC-8
AUIRS2301STR from Infineon Technologies, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC | power_in | Low-side and logic fixed supply, with a recommended range of 5V to 20V. |
| 2 | HIN | input | Logic input for the high-side gate driver output (HO), in phase with HO, compatible with 3.3V, 5V and 15V logic with VIH minimum 2.5V and VIL maximum 0.8V. |
| 3 | LIN | input | Logic input for the low-side gate driver output (LO), in phase with LO, compatible with 3.3V, 5V and 15V logic with VIH minimum 2.5V and VIL maximum 0.8V. |
| 4 | COM | power_in | Low-side return; all voltage parameters are referenced to COM. |
| 5 | LO | output | Low-side gate drive output, with typical pulsed source current of 200mA and sink current of 350mA (PW ≤ 10µs). |
| 6 | VS | power_in | High-side floating supply return, with a floating supply offset voltage rated from 1V to 600V and an allowable offset transient of 50 V/ns. |
| 7 | HO | output | High-side gate drive output, in phase with HIN, referenced to VS and driven between VS and VB. |
| 8 | VB | power_in | High-side floating supply, which must be held between VS + 5V and VS + 20V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Infineon Technologies |
| Package | SOIC-8 |
| Category | Power Management ICs |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| High-side floating supply offset voltage | VS | 1 | 600 | V | Dagger note: logic operational for VS of -5 V to +600 V | 5 | |
| Low-side and logic fixed supply voltage | VCC | 5 | 20 | V | 5 | ||
| Low-side output voltage | VLO | 0 | V | 5 | |||
| Ambient temperature | TA | -40 | 125 | °C | 5 | ||
| High-side floating absolute voltage | VB | -0.3 | 625 | V | 5 | ||
| Low-side and logic fixed supply voltage | VCC | -0.3 | 25 | V | 5 | ||
| Allowable offset supply voltage transient | dVS/dt | 50 | V/ns | 5 | |||
| Package power dissipation | PD | 0.625 | W | TA ≤ 25°C | 5 | ||
| Thermal resistance, junction to ambient | RthJA | 200 | °C/W | 5 | |||
| Junction temperature | TJ | 150 | °C | 5 | |||
| Storage temperature | TS | -50 | 150 | °C | 5 | ||
| Lead temperature (soldering) | TL | 300 | °C | soldering, 10 seconds | 5 | ||
| Logic "1" input voltage | VIH | 2.5 | V | VCC = 10V to 20V | 6 | ||
| Logic "0" input voltage | VIL | 0.8 | V | VCC = 10V to 20V | 6 | ||
| High level output voltage, VBIAS - VO | VOH | 0.2 | V | IO = 2mA | 6 | ||
| Low level output voltage, VO | VOL | 0.1 | V | IO = 2mA | 6 | ||
| Offset supply leakage current | ILK | 50 | µA | VB = VS = 600V | 6 | ||
| Quiescent VBS supply current | IQBS | 60 | 160 | 260 | µA | VIN = 0V or 5V | 6 |
| Quiescent VCC supply current | IQCC | 60 | 160 | 260 | µA | VIN = 0V or 5V | 6 |
| Logic "1" input bias current | IIN+ | 5 | 20 | µA | VIN = 5V | 6 | |
| Logic "0" input bias current | IIN- | 5 | µA | VIN = 0V | 6 | ||
| VCC supply undervoltage positive going threshold | VCCUV+ | 3.3 | 4.1 | 5 | V | 6 | |
| VCC supply undervoltage negative going threshold | VCCUV- | 3 | 3.8 | 4.7 | V | 6 | |
| VCC supply undervoltage hysteresis | VCCUVH | 0.1 | 0.3 | V | 6 | ||
| VBS supply undervoltage positive going threshold | VBSUV+ | 3.3 | 4.1 | 5 | V | 6 | |
| VBS supply undervoltage negative going threshold | VBSUV- | 3 | 3.8 | 4.7 | V | 6 | |
| VBS supply undervoltage hysteresis | VBSUVH | 0.1 | 0.3 | V | 6 | ||
| Turn-on propagation delay | ton | 220 | 300 | ns | VS = 0V | 6 | |
| Turn-off propagation delay | toff | 200 | 280 | ns | VS = 0V or 600V | 6 | |
| Delay matching, HS & LS turn-on/off | MT | 0 | 50 | ns | 6 | ||
| Turn-on rise time | tr | 130 | 220 | ns | VS = 0V | 6 | |
| Turn-off fall time | tf | 50 | 80 | ns | VS = 0V | 6 |
CAD (KiCad official)
- Symbol:
AUIRS2301STR - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
auirs2301str-etched.step/auirs2301str-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);auirs2301str.step/auirs2301str.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Infineon Technologies datasheet (19 pp, sha256
8682fe90afa3ea50, retrieved 2026-10-30, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).