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AUIRFR3607TRPBF-VB
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VBsemi Elec MOSFETs, TO-252. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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AUIRFR3607TRPBF-VB
VBsemi Elec · MOSFETs · TO-252
AUIRFR3607TRPBF-VB from VBsemi Elec, in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate terminal; gate-source voltage is limited to ±20 V (absolute maximum) and the gate threshold is 2.5 V min to 4.0 V max at VDS = VGS, ID = 250 μA. |
| 2 | D | passive | Drain terminal (also the mounting tab); drain-source voltage is rated at 80 V and continuous drain current is 75 A at TC = 25 °C (package limited). |
| 3 | S | passive | Source terminal; continuous source-drain diode current is 75 A at TC = 25 °C and the pulsed diode forward current is 150 A. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | VBsemi Elec |
| Package | TO-252 |
| Category | Transistors/Thyristors |
| Pins | 3 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | d. The TO-220 is a leadless package. The end of the lead terminal is exposed copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cann | 1 |
CAD (KiCad official)
- Symbol:
AUIRFR3607TRPBF-VB - Footprint:
Package_TO_SOT_SMD:TO-252-2 - 3D model: TO-252 (KiCad packages3D, STEP)
- 3D model files:
auirfr3607trpbf-vb-etched.step/auirfr3607trpbf-vb-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);auirfr3607trpbf-vb.step/auirfr3607trpbf-vb.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: VBsemi Elec datasheet (9 pp, sha256
2bd5b4d59f7b5c31, retrieved 2026-11-02, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# AUIRFR3607TRPBF-VB
**VBsemi Elec** · MOSFETs · TO-252
AUIRFR3607TRPBF-VB from VBsemi Elec, in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate terminal; gate-source voltage is limited to ±20 V (absolute maximum) and the gate threshold is 2.5 V min to 4.0 V max at VDS = VGS, ID = 250 μA. |
| 2 | D | passive | Drain terminal (also the mounting tab); drain-source voltage is rated at 80 V and continuous drain current is 75 A at TC = 25 °C (package limited). |
| 3 | S | passive | Source terminal; continuous source-drain diode current is 75 A at TC = 25 °C and the pulsed diode forward current is 150 A. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | VBsemi Elec |
| Package | TO-252 |
| Category | Transistors/Thyristors |
| Pins | 3 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | | d. The TO-220 is a leadless package. The end of the lead terminal is exposed copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cann | 1 |
## CAD (KiCad official)
- Symbol: `AUIRFR3607TRPBF-VB`
- Footprint: `Package_TO_SOT_SMD:TO-252-2`
- 3D model: TO-252 (KiCad packages3D, STEP)
- 3D model files: `auirfr3607trpbf-vb-etched.step` / `auirfr3607trpbf-vb-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `auirfr3607trpbf-vb.step` / `auirfr3607trpbf-vb.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [VBsemi Elec datasheet](docs/auirfr3607trpbf-vb-datasheet.pdf) (9 pp, sha256 `2bd5b4d59f7b5c31`, retrieved 2026-11-02, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/auirfr3607trpbf-vb-datasheet.pdf)